From 5ec6a48a4b8c1d5b3ec0eea61d3ea30a1e1d5469 Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Mon, 6 Oct 2008 12:14:52 +0000
Subject: [PATCH] basic smoketest on lm3s3748.elf

git-svn-id: svn://svn.berlios.de/openocd/trunk@1020 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
 src/target/target/zy1000.cfg         |  25 ++-
 testing/examples/cortex/lm3s3748.elf | Bin 0 -> 10122 bytes
 testing/examples/cortex/test.c       |  27 ++++
 testing/examples/cortex/test.ld      | 220 +++++++++++++++++++++++++++
 4 files changed, 271 insertions(+), 1 deletion(-)
 create mode 100644 testing/examples/cortex/lm3s3748.elf
 create mode 100644 testing/examples/cortex/test.c
 create mode 100644 testing/examples/cortex/test.ld

diff --git a/src/target/target/zy1000.cfg b/src/target/target/zy1000.cfg
index 7a1b8b98a..d54925a58 100644
--- a/src/target/target/zy1000.cfg
+++ b/src/target/target/zy1000.cfg
@@ -21,7 +21,30 @@ arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable
 
 flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
-[new_target_name] configure -event old-post_reset { script event/zy1000_reset.script }
+[new_target_name] configure -event reset-init { 
+
+# Set up chip selects & timings
+mww 0xFFE00000 0x0100273D
+mww 0xFFE00004 0x08002125
+mww 0xFFEe0008 0x02002125
+mww 0xFFE0000c 0x03002125
+mww 0xFFE00010 0x40000000
+mww 0xFFE00014 0x50000000
+mww 0xFFE00018 0x60000000
+mww 0xFFE0001c 0x70000000
+mww 0xFFE00020 0x00000001
+mww 0xFFE00024 0x00000000
+
+# remap  
+mww 0xFFFFF124 0xFFFFFFFF  
+mww 0xffff0010 0x100
+mww 0xffff0034 0x100
+
+#disable 16x5x UART interrupts
+mww 0x08020004 0
+
+
+}
 
 # required for usable performance. Used for lots of
 # other things than flash programming.
diff --git a/testing/examples/cortex/lm3s3748.elf b/testing/examples/cortex/lm3s3748.elf
new file mode 100644
index 0000000000000000000000000000000000000000..a3b90dca22463d65cf5ac95d112d9cb044e3a672
GIT binary patch
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literal 0
HcmV?d00001

diff --git a/testing/examples/cortex/test.c b/testing/examples/cortex/test.c
new file mode 100644
index 000000000..7e0c303fa
--- /dev/null
+++ b/testing/examples/cortex/test.c
@@ -0,0 +1,27 @@
+/* simple app. 
+
+modify test.ld to change address.
+
+Even if the app is position independent, the symbols
+need to match to test basic debugging.
+
+To load the app to 0x20000000 in GDB, use:
+
+load a.out
+monitor reg sp 0x20004000
+monitor reg pc 0x20002000
+stepi
+
+arm-elf-gcc -mthumb -mcpu=cortex-m3 -nostdlib -Ttest.ld test.c
+
+
+*/
+int j;
+void _start()
+{
+  int i;
+  for (i=0; i<1000; i++)
+    {
+      j++;
+    }
+}
diff --git a/testing/examples/cortex/test.ld b/testing/examples/cortex/test.ld
new file mode 100644
index 000000000..03b804e1d
--- /dev/null
+++ b/testing/examples/cortex/test.ld
@@ -0,0 +1,220 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
+	      "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = 0x20002000;
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+      *(.rel.sdata)
+      *(.rel.sdata.*)
+      *(.rel.gnu.linkonce.s*)
+    }
+  .rela.sdata     :
+    {
+      *(.rela.sdata)
+      *(.rela.sdata.*)
+      *(.rela.gnu.linkonce.s*)
+    }
+  .rel.sbss      : { *(.rel.sbss)		}
+  .rela.sbss     : { *(.rela.sbss)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .plt      : { *(.plt)	}
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+  {
+    *(.text)
+    *(.text.*)
+    *(.stub)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.gnu.linkonce.t*)
+    *(.glue_7t) *(.glue_7)
+  } =0
+  .init          : 
+  { 
+    KEEP (*(.init))
+  } =0
+  _etext = .;
+  PROVIDE (etext = .);
+  .fini      :
+  {
+    KEEP (*(.fini))
+  } =0
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+     the same address within the page on the next page up.  */
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+  {
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+    *(.gnu.linkonce.d*)
+    SORT(CONSTRUCTORS)
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+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    /* We don't want to include the .ctor section from
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+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  }
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+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  }
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+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
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+  {
+    *(.sdata) 
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+  }
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+  PROVIDE (edata = .);
+  __bss_start = .;
+  __bss_start__ = .;
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+  {
+    *(.dynsbss)
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+  }
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+   *(.dynbss)
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+  }
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+  /* DWARF 1 */
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+  .debug_ranges   0 : { *(.debug_ranges) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
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+  .debug_varnames  0 : { *(.debug_varnames) }
+  .stack 0x20004000 : { _stack = .; *(.stack) }
+  /* These must appear regardless of  .  */
+}