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cortex_a: target implementation renames cortex_a8 to cortex_a 

A previous commit changes the target name used by tcl scripts.
commit d9ba56c295
target: rename cortex_a8 to cortex_a

The current change renames target functions and definitions in the
implementation from cortex_a8 to cortex_a.
This prepares the implementation to support Cortex-A8, A9, A15-MPCore
in one place.

Change-Id: I73b5a38a92c12ba5bd3b806fbbb664817575a6d7
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1599
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
__archive__
Kamal Dasu 2013-08-29 11:53:26 -04:00 committed by Andreas Fritiofson
parent 84281d711e
commit 59c2239bfd
3 changed files with 400 additions and 399 deletions
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771
src/target/cortex_a.c
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File diff suppressed because it is too large Load Diff

24
src/target/cortex_a.h
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@ -27,12 +27,12 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/ ***************************************************************************/
#ifndef CORTEX_A8_H #ifndef CORTEX_A_H
#define CORTEX_A8_H #define CORTEX_A_H
#include "armv7a.h" #include "armv7a.h"
#define CORTEX_A8_COMMON_MAGIC 0x411fc082 #define CORTEX_A_COMMON_MAGIC 0x411fc082
#define CPUDBG_CPUID 0xD00 #define CPUDBG_CPUID 0xD00
#define CPUDBG_CTYPR 0xD04 #define CPUDBG_CTYPR 0xD04
@ -43,9 +43,9 @@
#define BRP_NORMAL 0 #define BRP_NORMAL 0
#define BRP_CONTEXT 1 #define BRP_CONTEXT 1
#define CORTEX_A8_PADDRDBG_CPU_SHIFT 13 #define CORTEX_A_PADDRDBG_CPU_SHIFT 13
struct cortex_a8_brp { struct cortex_a_brp {
int used; int used;
int type; int type;
uint32_t value; uint32_t value;
@ -53,7 +53,7 @@ struct cortex_a8_brp {
uint8_t BRPn; uint8_t BRPn;
}; };
struct cortex_a8_common { struct cortex_a_common {
int common_magic; int common_magic;
struct arm_jtag jtag_info; struct arm_jtag jtag_info;
@ -71,19 +71,19 @@ struct cortex_a8_common {
int brp_num_context; int brp_num_context;
int brp_num; int brp_num;
int brp_num_available; int brp_num_available;
struct cortex_a8_brp *brp_list; struct cortex_a_brp *brp_list;
/* Use cortex_a8_read_regs_through_mem for fast register reads */ /* Use cortex_a_read_regs_through_mem for fast register reads */
int fast_reg_read; int fast_reg_read;
struct armv7a_common armv7a_common; struct armv7a_common armv7a_common;
}; };
static inline struct cortex_a8_common * static inline struct cortex_a_common *
target_to_cortex_a8(struct target *target) target_to_cortex_a(struct target *target)
{ {
return container_of(target->arch_info, struct cortex_a8_common, armv7a_common.arm); return container_of(target->arch_info, struct cortex_a_common, armv7a_common.arm);
} }
#endif /* CORTEX_A8_H */ #endif /* CORTEX_A_H */

4
src/target/target.c
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@ -88,7 +88,7 @@ extern struct target_type feroceon_target;
extern struct target_type dragonite_target; extern struct target_type dragonite_target;
extern struct target_type xscale_target; extern struct target_type xscale_target;
extern struct target_type cortexm_target; extern struct target_type cortexm_target;
extern struct target_type cortexa8_target; extern struct target_type cortexa_target;
extern struct target_type cortexr4_target; extern struct target_type cortexr4_target;
extern struct target_type arm11_target; extern struct target_type arm11_target;
extern struct target_type mips_m4k_target; extern struct target_type mips_m4k_target;
@ -117,7 +117,7 @@ static struct target_type *target_types[] = {
&dragonite_target, &dragonite_target,
&xscale_target, &xscale_target,
&cortexm_target, &cortexm_target,
&cortexa8_target, &cortexa_target,
&cortexr4_target, &cortexr4_target,
&arm11_target, &arm11_target,
&mips_m4k_target, &mips_m4k_target,