diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 5234ac575..31ac0b4f0 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -240,22 +240,30 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	fields[0].num_bits = 32;
 	fields[0].out_value = reg->value;
 	fields[0].in_value = NULL;
+	fields[0].check_value = NULL;
+	fields[0].check_mask = NULL;
 
 	fields[1].tap = ice_reg->jtag_info->tap;
 	fields[1].num_bits = 5;
 	fields[1].out_value = field1_out;
 	buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
 	fields[1].in_value = NULL;
+	fields[1].check_value = NULL;
+	fields[1].check_mask = NULL;
 
 	fields[2].tap = ice_reg->jtag_info->tap;
 	fields[2].num_bits = 1;
 	fields[2].out_value = field2_out;
 	buf_set_u32(fields[2].out_value, 0, 1, 0);
 	fields[2].in_value = NULL;
+	fields[2].check_value = NULL;
+	fields[2].check_mask = NULL;
 
 	jtag_add_dr_scan(3, fields, TAP_INVALID);
 
 	fields[0].in_value = reg->value;
+	fields[0].check_value = check_value;
+	fields[0].check_mask = check_mask;
 
 	/* when reading the DCC data register, leaving the address field set to
 	 * EICE_COMMS_DATA would read the register twice
@@ -263,9 +271,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	 */
 	buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
-
-	jtag_check_value_mask(fields+0, check_value, check_mask);
+	jtag_add_dr_scan_check(3, fields, TAP_INVALID);
 
 	return ERROR_OK;
 }