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tcl/board: add configuration for Novena's integrated FPGA 

Change-Id: Iecd57c0ef59cfde98de36464a73436f57b0835e2
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
gitignore-build
Sean Cross 2016-06-28 12:12:34 +03:00 committed by Andreas Fritiofson
parent ca6ccad439
commit 537c019ced
1 changed files with 25 additions and 0 deletions
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25
tcl/board/novena-internal-fpga.cfg Normal file
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#
# Novena open hardware and F/OSS-friendly computing platform
#
# Design documentation:
# http://www.kosagi.com/w/index.php?title=Novena_PVT_Design_Source
#
# +-------------+--------------+------+-------+---------+
# | Pad name | Schematic | GPIO | sysfs | JTAG |
# +-------------+--------------+------+-------+---------+
# | DISP0_DAT13 | FPGA_RESET_N | 5-07 | 135 | RESET_N |
# | DISP0_DAT14 | FPGA_TCK | 5-08 | 136 | TCK |
# | DISP0_DAT15 | FPGA_TDI | 5-09 | 137 | TDI |
# | DISP0_DAT16 | FPGA_TDO | 5-10 | 138 | TDO |
# | DISP0_DAT17 | FPGA_TMS | 5-11 | 139 | TMS |
# +-------------+--------------+------+-------+---------+
interface sysfsgpio
transport select jtag
# TCK TMS TDI TDO
sysfsgpio_jtag_nums 136 139 137 138
source [find cpld/xilinx-xc6s.cfg]