From 7a4948c126fe027587ef6e2a96a708fcd00ef86c Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Mon, 26 Jun 2017 20:28:03 -0700 Subject: [PATCH 01/53] riscv: initial checkin of a 'compliance test' command. --- src/target/riscv/riscv.c | 48 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 7a40467f1..ca39d93f9 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -833,6 +833,9 @@ int riscv_openocd_deassert_reset(struct target *target) return ERROR_OK; } +// Declared below +const struct command_registration riscv_command_handlers[]; + struct target_type riscv_target = { .name = "riscv", @@ -868,6 +871,8 @@ struct target_type riscv_target = .arch_state = riscv_arch_state, .run_algorithm = riscv_run_algorithm, + + .commands = riscv_command_handlers }; /*** RISC-V Interface ***/ @@ -1236,3 +1241,46 @@ int riscv_dmi_write_u64_bits(struct target *target) RISCV_INFO(r); return r->dmi_write_u64_bits(target); } + +/* Command Handlers */ + +COMMAND_HANDLER(riscv_test_compliance) { + + //struct target *target = get_current_target(CMD_CTX); + //TODO: Create methods to check it's really RISC-V. + //struct riscv_target * riscv = (struct riscv_target*) target; + + if (CMD_ARGC > 0) { + if (strcmp(CMD_ARGV[0], "foo") == 0) + LOG_ERROR("FOO!"); + if (strcmp(CMD_ARGV[0], "bar") == 0) + LOG_DEBUG("BAR!"); + } else { + return ERROR_FAIL; + } + + return ERROR_OK; + +} + +static const struct command_registration riscv_exec_command_handlers[] = { + { + .name = "riscv_test_compliance", + .handler = riscv_test_compliance, + .mode = COMMAND_EXEC, + .usage = "['foo'|'bar']", + .help = "foos and bars" + }, + COMMAND_REGISTRATION_DONE +}; + +const struct command_registration riscv_command_handlers[] = { + { + .name = "riscv", + .mode = COMMAND_ANY, + .help = "RISC-V Command Group", + .usage = "", + .chain = riscv_exec_command_handlers + }, + COMMAND_REGISTRATION_DONE +}; From 95ee7975ea69191ac01bebbc853b07e9db87003a Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Tue, 27 Jun 2017 09:46:36 -0700 Subject: [PATCH 02/53] riscv: Add skeleton of RISC-V v013 compliance --- src/target/riscv/riscv-013.c | 19 ++++++++++++++++++- src/target/riscv/riscv.c | 28 ++++++++++++++-------------- src/target/riscv/riscv.h | 1 + 3 files changed, 33 insertions(+), 15 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 60846debe..b50a5a4d1 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -64,6 +64,7 @@ static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a); static int riscv013_dmi_write_u64_bits(struct target *target); static void riscv013_fill_dmi_nop_u64(struct target *target, char *buf); static void riscv013_reset_current_hart(struct target *target); +static int riscv013_test_compliance(struct target *target); /** * Since almost everything can be accomplish by scanning the dbus register, all @@ -728,7 +729,8 @@ static int init_target(struct command_context *cmd_ctx, generic_info->fill_dmi_nop_u64 = &riscv013_fill_dmi_nop_u64; generic_info->dmi_write_u64_bits = &riscv013_dmi_write_u64_bits; generic_info->reset_current_hart = &riscv013_reset_current_hart; - + generic_info->test_compliance = &riscv013_test_compliance; + generic_info->version_specific = calloc(1, sizeof(riscv013_info_t)); if (!generic_info->version_specific) return ERROR_FAIL; @@ -2108,3 +2110,18 @@ void riscv013_clear_abstract_error(struct target *target) uint32_t acs = dmi_read(target, DMI_ABSTRACTCS); dmi_write(target, DMI_ABSTRACTCS, acs); } + +int riscv013_test_compliance(struct target *target) { + LOG_INFO("Testing Compliance against RISC-V Debug Spec v0.13"); + + int total_tests = 0; + int passed_tests = 0; + + LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); + + if (total_tests == passed_tests) { + return ERROR_OK; + } else { + return ERROR_FAIL; + } +} diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index ca39d93f9..e5f4fe3e0 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1246,30 +1246,30 @@ int riscv_dmi_write_u64_bits(struct target *target) COMMAND_HANDLER(riscv_test_compliance) { - //struct target *target = get_current_target(CMD_CTX); - //TODO: Create methods to check it's really RISC-V. - //struct riscv_target * riscv = (struct riscv_target*) target; - + struct target *target = get_current_target(CMD_CTX); + + RISCV_INFO(r); + if (CMD_ARGC > 0) { - if (strcmp(CMD_ARGV[0], "foo") == 0) - LOG_ERROR("FOO!"); - if (strcmp(CMD_ARGV[0], "bar") == 0) - LOG_DEBUG("BAR!"); + LOG_ERROR("Command does not take any parameters."); + return ERROR_FAIL; + } + + if (r->test_compliance) { + return r->test_compliance(target); } else { + LOG_ERROR("This target does not support this command (may implement an older version of the spec)."); return ERROR_FAIL; } - - return ERROR_OK; - } static const struct command_registration riscv_exec_command_handlers[] = { { - .name = "riscv_test_compliance", + .name = "test_compliance", .handler = riscv_test_compliance, .mode = COMMAND_EXEC, - .usage = "['foo'|'bar']", - .help = "foos and bars" + .usage = "", + .help = "Runs a basic compliance test suite against the RISC-V Debug Spec." }, COMMAND_REGISTRATION_DONE }; diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index e23d49d1f..1c4b7ed92 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -92,6 +92,7 @@ typedef struct { void (*fill_dmi_read_u64)(struct target *target, char *buf, int a); void (*fill_dmi_nop_u64)(struct target *target, char *buf); void (*reset_current_hart)(struct target *target); + int (*test_compliance)(struct target *target); } riscv_info_t; /* Everything needs the RISC-V specific info structure, so here's a nice macro From ccc605158a9412436e08b737ac8b699fcb587e7d Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Tue, 27 Jun 2017 15:01:42 -0700 Subject: [PATCH 03/53] riscv: Added several compliance test items --- src/target/riscv/riscv-013.c | 155 +++++++++++++++++++++++++++++++++++ 1 file changed, 155 insertions(+) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index b50a5a4d1..66d31b474 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2111,12 +2111,167 @@ void riscv013_clear_abstract_error(struct target *target) dmi_write(target, DMI_ABSTRACTCS, acs); } +#define COMPLIANCE_TEST(b, message) { \ + int pass = 0; \ + if (b) { \ + pass = 1; \ + passed_tests ++; \ + } \ + LOG_INFO("%s test %d (%s)\n", (pass) ? "PASSED":"FAILED", total_tests, message); \ + total_tests ++; \ + } + int riscv013_test_compliance(struct target *target) { LOG_INFO("Testing Compliance against RISC-V Debug Spec v0.13"); + if (!riscv_rtos_enabled(target)) { + LOG_ERROR("Please run with -rtos riscv to run compliance test."); + return ERROR_FAIL; + } + int total_tests = 0; int passed_tests = 0; + uint32_t dmcontrol_orig = dmi_read(target, DMI_DMCONTROL); + uint32_t dmcontrol; + uint32_t testvar; + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSEL, RISCV_MAX_HARTS-1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmcontrol = dmi_read(target, DMI_DMCONTROL); + COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSEL) == (RISCV_MAX_HARTS-1), "DMCONTROL.hartsel should hold MAX_HARTS - 1"); + + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSEL, 0); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmcontrol = dmi_read(target, DMI_DMCONTROL); + COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSEL) == 0, "DMCONTROL.hartsel should hold Hart ID 0"); + + // hartreset + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmcontrol = dmi_read(target, DMI_DMCONTROL); + testvar = get_field(dmcontrol, DMI_DMCONTROL_HARTRESET); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmcontrol = dmi_read(target, DMI_DMCONTROL); + COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HARTRESET)) == 0), "DMCONTROL.hartreset can be 0 or RW."); + + // hasel + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmcontrol = dmi_read(target, DMI_DMCONTROL); + testvar = get_field(dmcontrol, DMI_DMCONTROL_HASEL); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmcontrol = dmi_read(target, DMI_DMCONTROL); + COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HASEL)) == 0), "DMCONTROL.hasel can be 0 or RW."); + //TODO: test that hamask registers exist if hasel does. + + // TODO: ndmreset + + // TODO: dmactive + + // haltreq + riscv_halt_all_harts(target); + // TODO: resumereq + + // HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. + for (uint32_t hartsel = 0; hartsel < riscv_count_harts(target); hartsel++){ + riscv_set_current_hartid(target, hartsel); + uint32_t dmstatus = dmi_read(target, DMI_DMSTATUS); + if (get_field(dmstatus, DMI_DMSTATUS_ANYNONEXISTENT)) { + break; + } + + uint32_t hartinfo = dmi_read(target, DMI_HARTINFO); + dmi_write (target, DMI_HARTINFO, ~hartinfo); + COMPLIANCE_TEST((dmi_read(target, DMI_HARTINFO) == hartinfo), "DMHARTINFO should be Read-Only."); + + uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); + for (int d = 0; d < nscratch; d++) { + + for (testvar = 0x00112233; testvar != 0xDEAD ; testvar = testvar == 0x00112233 ? ~testvar : 0xDEAD ) { + + struct riscv_program program32; + riscv_program_init(&program32, target); + riscv_addr_t addr_in = riscv_program_alloc_x(&program32); + riscv_addr_t addr_out = riscv_program_alloc_x(&program32); + + riscv_program_write_ram(&program32, addr_in, testvar); + if (riscv_xlen(target) > 32) { + riscv_program_write_ram(&program32, addr_in + 4, testvar); + } + + riscv_program_lx(&program32, GDB_REGNO_S0, addr_in); + riscv_program_csrrw(&program32, GDB_REGNO_S0, GDB_REGNO_S0, GDB_REGNO_DSCRATCH); + riscv_program_csrrw(&program32, GDB_REGNO_S1, GDB_REGNO_S1, GDB_REGNO_DSCRATCH); + riscv_program_sx(&program32, GDB_REGNO_S1, addr_out); + riscv_program_fence(&program32); + COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, "Accessing DSCRATCH with program buffer should succeed."); + + COMPLIANCE_TEST(riscv_program_read_ram(&program32, addr_out) == testvar, "All DSCRATCH registers in HARTINFO must be R/W."); + if (riscv_xlen(target) > 32) { + COMPLIANCE_TEST(riscv_program_read_ram(&program32, addr_out + 4) == testvar, "All DSCRATCH registers in HARTINFO must be R/W."); + } + } + } + + // TODO: dataaccess + if (get_field(hartinfo, DMI_HARTINFO_DATAACCESS)) { + // TODO: Shadowed in memory map. + // TODO: datasize + // TODO: dataaddr + } else { + // TODO: Shadowed in CSRs. + // TODO: datasize + // TODO: dataaddr + } + + } + + // HALTSUM + uint32_t expected_haltsum = 0; + for (unsigned int i = 0; i < riscv_count_harts(target); i +=32){ + expected_haltsum |= (1 << (i / 32)); + } + COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM should report all halted harts"); + + // TODO: HAWINDOWSEL + // TODO: HAWINDOW + + // ABSTRACTCS + + uint32_t abstractcs = dmi_read(target, DMI_ABSTRACTCS); + + // Check that all reported Data Words are really R/W + for (int invert = 0; invert < 2; invert++) { + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ + testvar = (i + 1) * 0x11111111; + if (invert) {testvar = ~testvar;} + dmi_write(target, DMI_DATA0 + i, testvar); + } + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ + testvar = (i + 1) * 0x11111111; + if (invert) {testvar = ~testvar;} + COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "All reported DATA words must be R/W"); + } + } + + // Check that all reported ProgBuf words are really R/W + for (int invert = 0; invert < 2; invert++) { + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + testvar = (i + 1) * 0x11111111; + if (invert) {testvar = ~testvar;} + dmi_write(target, DMI_PROGBUF0 + i, testvar); + } + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + testvar = (i + 1) * 0x11111111; + if (invert) {testvar = ~testvar;} + COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == testvar, "All reported PROGBUF words must be R/W"); + } + } + + // TODO: Cause and clear all error types + LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); if (total_tests == passed_tests) { From 9e76ec177959906cfb8dd0adabf97182cb24e656 Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Tue, 27 Jun 2017 22:07:04 -0700 Subject: [PATCH 04/53] riscv: Compliance test for HALTREQ/RESUMEREQ R/W --- src/jtag/drivers/libjaylink | 2 +- src/target/riscv/riscv-013.c | 119 +++++++++++++++++++++++++++++++---- 2 files changed, 108 insertions(+), 13 deletions(-) diff --git a/src/jtag/drivers/libjaylink b/src/jtag/drivers/libjaylink index 699b7001d..d57dee67b 160000 --- a/src/jtag/drivers/libjaylink +++ b/src/jtag/drivers/libjaylink @@ -1 +1 @@ -Subproject commit 699b7001d34a79c8e7064503dde1bede786fd7f0 +Subproject commit d57dee67bc756291b7d8b51d350d1c6213e514f0 diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 66d31b474..a68594c9e 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1807,7 +1807,7 @@ static void riscv013_halt_current_hart(struct target *target) /* Issue the halt command, and then wait for the current hart to halt. */ uint32_t dmcontrol = dmi_read(target, DMI_DMCONTROL); - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HALTREQ, 1); + dmcontrol |= DMI_DMCONTROL_HALTREQ; dmi_write(target, DMI_DMCONTROL, dmcontrol); for (size_t i = 0; i < 256; ++i) if (riscv_is_halted(target)) @@ -1823,7 +1823,7 @@ static void riscv013_halt_current_hart(struct target *target) abort(); } - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HALTREQ, 0); + dmcontrol &= ~DMI_DMCONTROL_HALTREQ; dmi_write(target, DMI_DMCONTROL, dmcontrol); } @@ -1963,7 +1963,7 @@ void riscv013_reset_current_hart(struct target *target) select_dmi(target); uint32_t control = dmi_read(target, DMI_DMCONTROL); control = set_field(control, DMI_DMCONTROL_NDMRESET, 1); - control = set_field(control, DMI_DMCONTROL_HALTREQ, 1); + control |= DMI_DMCONTROL_HALTREQ; dmi_write(target, DMI_DMCONTROL, control); control = set_field(control, DMI_DMCONTROL_NDMRESET, 0); @@ -1971,7 +1971,7 @@ void riscv013_reset_current_hart(struct target *target) while (get_field(dmi_read(target, DMI_DMSTATUS), DMI_DMSTATUS_ALLHALTED) == 0); - control = set_field(control, DMI_DMCONTROL_HALTREQ, 0); + control &= ~DMI_DMCONTROL_HALTREQ; dmi_write(target, DMI_DMCONTROL, control); } @@ -2118,6 +2118,7 @@ void riscv013_clear_abstract_error(struct target *target) passed_tests ++; \ } \ LOG_INFO("%s test %d (%s)\n", (pass) ? "PASSED":"FAILED", total_tests, message); \ + assert(pass); \ total_tests ++; \ } @@ -2172,22 +2173,46 @@ int riscv013_test_compliance(struct target *target) { // haltreq riscv_halt_all_harts(target); - // TODO: resumereq + // Writing haltreq should not cause any problems for a halted hart, but we + // should be able to read and write it. + dmcontrol = dmi_read(target, DMI_DMCONTROL); + dmcontrol |= DMI_DMCONTROL_HALTREQ; + dmi_write(target, DMI_DMCONTROL, dmcontrol); + COMPLIANCE_TEST(dmi_read(target, DMI_DMCONTROL) & DMI_DMCONTROL_HALTREQ, "DMCONTROL.haltreq should be R/W"); + uint32_t dmstatus; + do { + dmstatus = dmi_read(target, DMI_DMSTATUS); + } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); + // resumereq. This will resume the hart but this test is destructive anyway. + dmcontrol &= ~DMI_DMCONTROL_HALTREQ; + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_DMCONTROL), DMI_DMCONTROL_RESUMEREQ) == 1, "DMCONTROL.resumereq should be R/W"); + + do { + dmstatus = dmi_read(target, DMI_DMSTATUS); + } while (get_field(dmstatus, DMI_DMSTATUS_ALLRESUMEACK) == 0); + + // Halt the hart again because the target isn't aware that we resumed it. + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 0); + dmcontrol |= DMI_DMCONTROL_HALTREQ; + dmi_write(target, DMI_DMCONTROL, dmcontrol); + do { + dmstatus = dmi_read(target, DMI_DMSTATUS); + } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); + + // HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. - for (uint32_t hartsel = 0; hartsel < riscv_count_harts(target); hartsel++){ + for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++){ riscv_set_current_hartid(target, hartsel); - uint32_t dmstatus = dmi_read(target, DMI_DMSTATUS); - if (get_field(dmstatus, DMI_DMSTATUS_ANYNONEXISTENT)) { - break; - } uint32_t hartinfo = dmi_read(target, DMI_HARTINFO); dmi_write (target, DMI_HARTINFO, ~hartinfo); COMPLIANCE_TEST((dmi_read(target, DMI_HARTINFO) == hartinfo), "DMHARTINFO should be Read-Only."); uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); - for (int d = 0; d < nscratch; d++) { + for (unsigned int d = 0; d < nscratch; d++) { for (testvar = 0x00112233; testvar != 0xDEAD ; testvar = testvar == 0x00112233 ? ~testvar : 0xDEAD ) { @@ -2230,12 +2255,19 @@ int riscv013_test_compliance(struct target *target) { // HALTSUM uint32_t expected_haltsum = 0; - for (unsigned int i = 0; i < riscv_count_harts(target); i +=32){ + for (int i = 0; i < riscv_count_harts(target); i +=32){ expected_haltsum |= (1 << (i / 32)); } COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM should report all halted harts"); + for (int i = 0; i < riscv_count_harts(target); i +=32){ + uint32_t haltstat = dmi_read(target, 0x40 + (i / 32)); + uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFF : ((1 << (riscv_count_harts(target) % 32)) - 1); + COMPLIANCE_TEST(haltstat == haltstat_expected, "Halt Status Registers should report all halted harts."); + } + // TODO: HAWINDOWSEL + // TODO: HAWINDOW // ABSTRACTCS @@ -2271,6 +2303,69 @@ int riscv013_test_compliance(struct target *target) { } // TODO: Cause and clear all error types + + // COMMAND + // TODO: Unclear from the spec whether all these bits need to truly be R/W. + // But at any rate, this is not legal and should cause an error. + dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); + COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xAAAAAAAA, "COMMAND register should be R/W"); + uint32_t result = dmi_read(target, DMI_ABSTRACTCS); + LOG_INFO("result is %x", result); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0x2, "Illegal COMMAND should result in UNSUPPORTED"); + dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + dmi_write(target, DMI_COMMAND, 0x55555555); + COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0x55555555, "COMMAND register should be R/W"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0x2, "Illegal COMMAND should result in UNSUPPORTED"); + dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + + // ABSTRACTAUTO + // See which bits are actually writable + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + uint32_t abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); + if (abstractauto > 0) { + testvar = 0; + // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not + // a true compliance requirement. + struct riscv_program program; + riscv_program_init(&program, target); + riscv_addr_t addr = riscv_program_alloc_x(&program); + riscv_program_lx(&program, GDB_REGNO_S0, addr); + riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); + riscv_program_sx(&program, GDB_REGNO_S0, addr); + riscv_program_write_ram(&program, addr + 4, 0); + if (riscv_xlen(target) > 32) { + riscv_program_write_ram(&program, addr, 0); + } + dmi_write(target, DMI_ABSTRACTAUTO, 0x0); + riscv_program_exec(&program, target); + testvar ++; + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); + uint32_t autoexec_data = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECDATA); + uint32_t autoexec_progbuf = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF); + for (unsigned int i = 0; i < 12; i ++){ + dmi_read(target, DMI_DATA0 + i); + while(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY)); + if (autoexec_data & (1 << i)) { + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT), "AUTOEXEC may be writable up to DATACOUNT bits."); + testvar ++; + } + } + for (unsigned int i = 0; i < 16; i ++){ + dmi_read(target, DMI_PROGBUF0 + i); + while(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY)); + if (autoexec_progbuf & (1 << i)) { + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE), "AUTOEXEC may be writable up to PROGSIZE bits."); + testvar ++; + } + } + + dmi_write(target, DMI_ABSTRACTAUTO, 0); + int d_addr = (addr - riscv_debug_buffer_addr(target))/4 ; + + COMPLIANCE_TEST(testvar == riscv_read_debug_buffer_x(target, d_addr), \ + "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); + } LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); From 222850df55f10ae6e7821239c72492bf36bf3d6f Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Tue, 27 Jun 2017 22:29:35 -0700 Subject: [PATCH 05/53] debug: add a 'wfi' to compliance test. --- src/target/riscv/opcodes.h | 3 +++ src/target/riscv/riscv-013.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/src/target/riscv/opcodes.h b/src/target/riscv/opcodes.h index c4d9baf6f..a27a3dcba 100644 --- a/src/target/riscv/opcodes.h +++ b/src/target/riscv/opcodes.h @@ -210,6 +210,9 @@ static uint32_t ebreak(void) { return MATCH_EBREAK; } static uint32_t ebreak_c(void) __attribute__ ((unused)); static uint32_t ebreak_c(void) { return MATCH_C_EBREAK; } +static uint32_t wfi(void) __attribute__ ((unused)); +static uint32_t wfi(void) { return MATCH_WFI; } + static uint32_t fence_i(void) __attribute__ ((unused)); static uint32_t fence_i(void) { diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index a68594c9e..506c3c6de 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2330,6 +2330,8 @@ int riscv013_test_compliance(struct target *target) { riscv_program_init(&program, target); riscv_addr_t addr = riscv_program_alloc_x(&program); riscv_program_lx(&program, GDB_REGNO_S0, addr); + // Also testing that WFI() is a NOP during debug mode. + riscv_program_insert(&program, wfi()); riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); riscv_program_sx(&program, GDB_REGNO_S0, addr); riscv_program_write_ram(&program, addr + 4, 0); @@ -2366,6 +2368,8 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(testvar == riscv_read_debug_buffer_x(target, d_addr), \ "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); } + + // DCSR Tests LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); From e17ca3a31db6a9875d09aebd8fefac034d57d820 Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Tue, 27 Jun 2017 23:20:16 -0700 Subject: [PATCH 06/53] riscv: More compliance tests for core registers. --- src/target/riscv/riscv-013.c | 56 ++++++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 6 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 506c3c6de..b0f73ea4e 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2310,14 +2310,44 @@ int riscv013_test_compliance(struct target *target) { dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xAAAAAAAA, "COMMAND register should be R/W"); uint32_t result = dmi_read(target, DMI_ABSTRACTCS); - LOG_INFO("result is %x", result); - COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0x2, "Illegal COMMAND should result in UNSUPPORTED"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ + "Illegal COMMAND should result in UNSUPPORTED"); dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); dmi_write(target, DMI_COMMAND, 0x55555555); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0x55555555, "COMMAND register should be R/W"); - COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0x2, "Illegal COMMAND should result in UNSUPPORTED"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ + "Illegal COMMAND should result in UNSUPPORTED"); dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + // Basic Abstract Commands + uint32_t command = 0; + uint32_t busy; + command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3:2); + command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1); + for (int i = 1 ; i < 32 ; i = i << 1) { + command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_X0 + i); + command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1); + dmi_write(target, DMI_DATA0, i); + if (riscv_xlen(target) > 32) { + dmi_write(target, DMI_DATA0 + 1, i + 1); + } + dmi_write(target, DMI_COMMAND, command); + do { busy = get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY);} while (busy); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0, "GPR Writes should be supported."); + dmi_write(target, DMI_DATA0, 0xDEADBEEF); + if (riscv_xlen(target) > 32) { + dmi_write(target, DMI_DATA0 + 1, 0xDEADBEEF); + } + command = set_field(command, AC_ACCESS_REGISTER_WRITE, 0); + dmi_write(target, DMI_COMMAND, command); + do { busy = get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY);} while (busy); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0, "GPR Reads should be supported."); + COMPLIANCE_TEST(dmi_read(target, DMI_DATA0) == i, "GPR Reads and writes should be supported."); + if (riscv_xlen(target) > 32) { + COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + 1) == (i + 1), "GPR Reads and writes should be supported."); + } + } + // ABSTRACTAUTO // See which bits are actually writable dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); @@ -2347,7 +2377,7 @@ int riscv013_test_compliance(struct target *target) { uint32_t autoexec_progbuf = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF); for (unsigned int i = 0; i < 12; i ++){ dmi_read(target, DMI_DATA0 + i); - while(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY)); + do { busy = get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY);} while (busy); if (autoexec_data & (1 << i)) { COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT), "AUTOEXEC may be writable up to DATACOUNT bits."); testvar ++; @@ -2355,7 +2385,7 @@ int riscv013_test_compliance(struct target *target) { } for (unsigned int i = 0; i < 16; i ++){ dmi_read(target, DMI_PROGBUF0 + i); - while(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY)); + do { busy = get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY);} while (busy); if (autoexec_progbuf & (1 << i)) { COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE), "AUTOEXEC may be writable up to PROGSIZE bits."); testvar ++; @@ -2369,7 +2399,21 @@ int riscv013_test_compliance(struct target *target) { "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); } - // DCSR Tests + // Core Register Tests + for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ + riscv_set_current_hartid(target, hartsel); + // DCSR Tests + riscv_set_register(target, GDB_REGNO_DCSR, 0x0); + COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DCSR) != 0, "Not all bits in DCSR are writable by Debugger"); + riscv_set_register(target, GDB_REGNO_DCSR, 0xFFFFFFFF); + COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DCSR) != 0, "At least some bits in DCSR must be 1"); + // DPC + uint64_t testvar64 = 0xAAAAAAAAAAAAAAAAUL; + riscv_set_register(target, GDB_REGNO_DPC, testvar64); + COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DPC) == testvar64, "DPC must be writable."); + riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); + COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DPC) == ~testvar64, "DPC must be writable"); + } LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); From 41017409284f821b5a3d377b8fc7230c32ffe75d Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Wed, 28 Jun 2017 13:52:35 -0700 Subject: [PATCH 07/53] riscv: add compliance tests for DPC and DCSR --- src/target/riscv/riscv-013.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index b0f73ea4e..776bf5616 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2402,17 +2402,23 @@ int riscv013_test_compliance(struct target *target) { // Core Register Tests for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ riscv_set_current_hartid(target, hartsel); + // DCSR Tests riscv_set_register(target, GDB_REGNO_DCSR, 0x0); COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DCSR) != 0, "Not all bits in DCSR are writable by Debugger"); riscv_set_register(target, GDB_REGNO_DCSR, 0xFFFFFFFF); COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DCSR) != 0, "At least some bits in DCSR must be 1"); + // DPC uint64_t testvar64 = 0xAAAAAAAAAAAAAAAAUL; + uint64_t dpcmask = 0xFFFFFFFFFFFFFFFFUL; + riscv_set_register(target, GDB_REGNO_DPC, dpcmask); + dpcmask = riscv_get_register(target, GDB_REGNO_PC); + COMPLIANCE_TEST(dpcmask >= 0xFFFFFFFF, "DPC must hold at least 32 bits (may hold more but hard to tell how many)"); riscv_set_register(target, GDB_REGNO_DPC, testvar64); - COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DPC) == testvar64, "DPC must be writable."); + COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); - COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DPC) == ~testvar64, "DPC must be writable"); + COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); } LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); From e32a8c911d8f90cc35b89869c82a238d0b9fff50 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 28 Jun 2017 18:58:28 -0700 Subject: [PATCH 08/53] riscv: Fix AUTOEXEC test for 32-bit cores --- src/target/riscv/riscv-013.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 776bf5616..f82f14fad 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2364,9 +2364,9 @@ int riscv013_test_compliance(struct target *target) { riscv_program_insert(&program, wfi()); riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); riscv_program_sx(&program, GDB_REGNO_S0, addr); - riscv_program_write_ram(&program, addr + 4, 0); + riscv_program_write_ram(&program, addr, 0); if (riscv_xlen(target) > 32) { - riscv_program_write_ram(&program, addr, 0); + riscv_program_write_ram(&program, addr+4, 0); } dmi_write(target, DMI_ABSTRACTAUTO, 0x0); riscv_program_exec(&program, target); From 434fb3708a2fef41a4107d4be68cd8e8a24c2f90 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 28 Jun 2017 19:17:48 -0700 Subject: [PATCH 09/53] riscv: Correct DPC masking in compliance test. --- src/target/riscv/riscv-013.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index f82f14fad..e5cddedec 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2413,8 +2413,8 @@ int riscv013_test_compliance(struct target *target) { uint64_t testvar64 = 0xAAAAAAAAAAAAAAAAUL; uint64_t dpcmask = 0xFFFFFFFFFFFFFFFFUL; riscv_set_register(target, GDB_REGNO_DPC, dpcmask); - dpcmask = riscv_get_register(target, GDB_REGNO_PC); - COMPLIANCE_TEST(dpcmask >= 0xFFFFFFFF, "DPC must hold at least 32 bits (may hold more but hard to tell how many)"); + dpcmask = riscv_get_register(target, GDB_REGNO_DPC); + COMPLIANCE_TEST(dpcmask >= 0xFFFFFFFC, "DPC must hold the minimum for a virtual address (may tighten requirement later)."); riscv_set_register(target, GDB_REGNO_DPC, testvar64); COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); From 7bc23c7776b58f0a1d2bedbe5a666633fbe514d8 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 28 Jun 2017 19:32:30 -0700 Subject: [PATCH 10/53] riscv: Add some comments on what else compliance test needs --- src/target/riscv/riscv-013.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index e5cddedec..4b9e3e735 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2419,8 +2419,28 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); + } + + //TODO: + // DMACTIVE + + // NDMRESET + // Asserting non-debug module reset should not reset Debug Module state. + // But it should reset Hart State, e.g. DPC should get a different value. + // Also make sure that DCSR reports cause of 'HALT' even though previously we single-stepped. + // DMCONTROL + // COMMAND + // PROGBUF + // ABSTRACTAUTO + // DATA + // TODO: HASEL, HAWINDOWSEL + + // Single-Step each hart. + + // Assert cause is SINGLESTEP + LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); if (total_tests == passed_tests) { From 8dc3c0a55cf5b855df215b5b3bf78aa0e98c4b00 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 28 Jun 2017 19:44:18 -0700 Subject: [PATCH 11/53] riscv: correct libjaylink version --- src/jtag/drivers/libjaylink | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/jtag/drivers/libjaylink b/src/jtag/drivers/libjaylink index d57dee67b..699b7001d 160000 --- a/src/jtag/drivers/libjaylink +++ b/src/jtag/drivers/libjaylink @@ -1 +1 @@ -Subproject commit d57dee67bc756291b7d8b51d350d1c6213e514f0 +Subproject commit 699b7001d34a79c8e7064503dde1bede786fd7f0 From 2b948881003ef0202fc2a60e7fd20606d9b18357 Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Wed, 5 Jul 2017 15:11:40 -0700 Subject: [PATCH 12/53] riscv: Add single-step, reset, and dmactive to the compliance test. --- src/target/riscv/riscv-013.c | 112 ++++++++++++++++++++++++++++------- 1 file changed, 90 insertions(+), 22 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8672853e7..56255f99e 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -447,8 +447,8 @@ static uint64_t dmi_read(struct target *target, uint16_t address) } if (status != DMI_STATUS_SUCCESS) { - LOG_ERROR("Failed read from 0x%x; value=0x%" PRIx64 ", status=%d", - address, value, status); + LOG_ERROR("Failed read from 0x%x" PRIx64 ", status=%d", + address, status); abort(); } @@ -1291,10 +1291,10 @@ static int assert_reset(struct target *target) control = set_field(control, DMI_DMCONTROL_NDMRESET, 1); if (target->reset_halt) { LOG_DEBUG("TARGET RESET HALT SET, ensuring halt is set during reset."); - control = set_field(control, DMI_DMCONTROL_HALTREQ, 1); + control |= DMI_DMCONTROL_HALTREQ; } else { LOG_DEBUG("TARGET RESET HALT NOT SET"); - control = set_field(control, DMI_DMCONTROL_HALTREQ, 0); + control &= ~DMI_DMCONTROL_HALTREQ; } dmi_write(target, DMI_DMCONTROL, control); @@ -1317,7 +1317,7 @@ static int deassert_reset(struct target *target) // Clear the reset, but make sure haltreq is still set if (target->reset_halt) { - control = set_field(control, DMI_DMCONTROL_HALTREQ, 1); + control |= DMI_DMCONTROL_HALTREQ; } control = set_field(control, DMI_DMCONTROL_NDMRESET, 0); @@ -2194,8 +2194,6 @@ int riscv013_test_compliance(struct target *target) { // TODO: ndmreset - // TODO: dmactive - // haltreq riscv_halt_all_harts(target); // Writing haltreq should not cause any problems for a halted hart, but we @@ -2423,8 +2421,17 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(testvar == riscv_read_debug_buffer_x(target, d_addr), \ "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); } - + + // Single-Step each hart. + for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ + riscv_set_current_hartid(target, hartsel); + riscv013_on_step(target); + riscv013_step_current_hart(target); + COMPLIANCE_TEST(riscv_halt_reason(target, hartsel) == RISCV_HALT_SINGLESTEP, "Single Step should result in SINGLESTEP"); + } + // Core Register Tests + uint64_t bogus_dpc; for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ riscv_set_current_hartid(target, hartsel); @@ -2443,28 +2450,89 @@ int riscv013_test_compliance(struct target *target) { riscv_set_register(target, GDB_REGNO_DPC, testvar64); COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); - COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); - + uint64_t dpc = riscv_get_register(target, GDB_REGNO_DPC); + COMPLIANCE_TEST((dpc & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); + if (hartsel == 0) {bogus_dpc = dpc;} // For a later test step } - - //TODO: - // DMACTIVE - + //NDMRESET // NDMRESET // Asserting non-debug module reset should not reset Debug Module state. // But it should reset Hart State, e.g. DPC should get a different value. // Also make sure that DCSR reports cause of 'HALT' even though previously we single-stepped. - // DMCONTROL - // COMMAND - // PROGBUF - // ABSTRACTAUTO - // DATA - // TODO: HASEL, HAWINDOWSEL + + // Write some registers. They should not be impacted by ndmreset. + dmi_write(target, DMI_COMMAND, 0xFFFFFFFF); + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + testvar = (i + 1) * 0x11111111; + dmi_write(target, DMI_PROGBUF0 + i, testvar); + } + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ + testvar = (i + 1) * 0x11111111; + dmi_write(target, DMI_DATA0 + i, testvar); + } - // Single-Step each hart. + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); - // Assert cause is SINGLESTEP + // Assert reset. + + target->reset_halt = true; + dmcontrol = dmi_read(target, DMI_DMCONTROL); + riscv_set_current_hartid(target, 0); + // Lie to OpenOCD and overwrite hartsel. + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HARTSEL, 0x5); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + assert_reset(target); + deassert_reset(target); + + + // Verify that most stuff is not affected by ndmreset. + COMPLIANCE_TEST(dmi_read(target, DMI_DMCONTROL) == dmcontrol, "NDMRESET should not affect DMI_DMSTATUS"); + COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xFFFFFFFF, "NDMRESET should not affect DMI_COMMAND"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0xFFFFFFFF, "NDMRESET should not affect DMI_ABSTRACTCS"); + COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == abstractauto, "NDMRESET should not affect DMI_ABSTRACTAUTO"); + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + testvar = (i + 1) * 0x11111111; + COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == testvar, "PROGBUF words must not be affected by NDMRESET"); + } + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ + testvar = (i + 1) * 0x11111111; + COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "DATA words must not be affected by NDMRESET"); + } + + // Stop lying to OpenOCD about which hart is selected. + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HARTSEL, 0); + + // verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be, + // just verify that at least it's not the bogus value anymore. + uint64_t dpc = riscv_get_register(target, GDB_REGNO_DPC); + COMPLIANCE_TEST(bogus_dpc != riscv_get_register(target, GDB_REGNO_DPC), "NDMRESET should move $DPC to reset value."); + COMPLIANCE_TEST(riscv_halt_reason(target, 0)==RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); + + // DMACTIVE -- deasserting DMACTIVE should reset all the above values. + + // Toggle dmactive + dmi_write(target, DMI_DMCONTROL, 0); + dmi_write(target, DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE); + COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0, "DMI_COMMAND should reset to 0"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0xFFFFFFFF, "ABSTRACTCS.cmderr should reset to 0"); + COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == 0, "ABSTRACTAUTO should reset to 0"); + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + testvar = (i + 1) * 0x11111111; + COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == 0, "PROGBUF words should reset to 0"); + } + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ + testvar = (i + 1) * 0x11111111; + COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "DATA words should reset to 0"); + } + LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); From bdc38561c089810ce655c38fefd8ccfaebb561aa Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Wed, 5 Jul 2017 17:54:55 -0700 Subject: [PATCH 13/53] riscv: Clean up reset/dmactive/step compliance test --- src/target/riscv/riscv-013.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 56255f99e..2a97dd634 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2224,7 +2224,10 @@ int riscv013_test_compliance(struct target *target) { do { dmstatus = dmi_read(target, DMI_DMSTATUS); } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); - + dmcontrol &= ~DMI_DMCONTROL_HALTREQ; + dmi_write(target, DMI_DMCONTROL, dmcontrol); + // Not clear that this read is required according to the spec. + dmi_read(target, DMI_DMSTATUS); // HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++){ @@ -2477,22 +2480,17 @@ int riscv013_test_compliance(struct target *target) { dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); - // Assert reset. + // Pulse reset. target->reset_halt = true; dmcontrol = dmi_read(target, DMI_DMCONTROL); riscv_set_current_hartid(target, 0); - // Lie to OpenOCD and overwrite hartsel. - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HARTSEL, 0x5); - dmi_write(target, DMI_DMCONTROL, dmcontrol); assert_reset(target); deassert_reset(target); - // Verify that most stuff is not affected by ndmreset. - COMPLIANCE_TEST(dmi_read(target, DMI_DMCONTROL) == dmcontrol, "NDMRESET should not affect DMI_DMSTATUS"); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xFFFFFFFF, "NDMRESET should not affect DMI_COMMAND"); - COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0xFFFFFFFF, "NDMRESET should not affect DMI_ABSTRACTCS"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, "NDMRESET should not affect DMI_ABSTRACTCS"); COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == abstractauto, "NDMRESET should not affect DMI_ABSTRACTAUTO"); for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ @@ -2505,14 +2503,11 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "DATA words must not be affected by NDMRESET"); } - // Stop lying to OpenOCD about which hart is selected. - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HARTSEL, 0); - // verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be, // just verify that at least it's not the bogus value anymore. uint64_t dpc = riscv_get_register(target, GDB_REGNO_DPC); COMPLIANCE_TEST(bogus_dpc != riscv_get_register(target, GDB_REGNO_DPC), "NDMRESET should move $DPC to reset value."); - COMPLIANCE_TEST(riscv_halt_reason(target, 0)==RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); + COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); // DMACTIVE -- deasserting DMACTIVE should reset all the above values. @@ -2520,7 +2515,7 @@ int riscv013_test_compliance(struct target *target) { dmi_write(target, DMI_DMCONTROL, 0); dmi_write(target, DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0, "DMI_COMMAND should reset to 0"); - COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0xFFFFFFFF, "ABSTRACTCS.cmderr should reset to 0"); + COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0, "ABSTRACTCS.cmderr should reset to 0"); COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == 0, "ABSTRACTAUTO should reset to 0"); for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ @@ -2530,7 +2525,7 @@ int riscv013_test_compliance(struct target *target) { for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ testvar = (i + 1) * 0x11111111; - COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "DATA words should reset to 0"); + COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == 0, "DATA words should reset to 0"); } From 6842fd2c105fc83fc2a50cefbdbd3fda56c2b83e Mon Sep 17 00:00:00 2001 From: mwachs5 Date: Wed, 5 Jul 2017 17:59:30 -0700 Subject: [PATCH 14/53] riscv: Add more TODO compliance comments --- src/target/riscv/riscv-013.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 2a97dd634..1c49b3fe3 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2527,7 +2527,13 @@ int riscv013_test_compliance(struct target *target) { testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == 0, "DATA words should reset to 0"); } - + + //TODO: + // DCSR.cause priorities + // DCSR.stoptime/stopcycle + // DCSR.stepie + // DCSR.ebreak + // DCSR.prv LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); From 66fa38add7864551b7b5f5c1f682e5675f7668a1 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 12 Jul 2017 18:44:41 -0700 Subject: [PATCH 15/53] riscv-compliance: Halt harts again at the end of the test. --- src/target/riscv/riscv-013.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 1c49b3fe3..336295e51 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2535,6 +2535,9 @@ int riscv013_test_compliance(struct target *target) { // DCSR.ebreak // DCSR.prv + /* Halt every hart for any follow-up tests*/ + riscv_halt_all_harts(target); + LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); if (total_tests == passed_tests) { From c8015e8dc1efd588d89c8ea04ee814f108176551 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 13 Jul 2017 07:57:57 -0700 Subject: [PATCH 16/53] riscv compliance: More post-test cleanup --- src/target/riscv/riscv-013.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 1b8f15fe1..2ef4ac1e3 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2667,6 +2667,10 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xFFFFFFFF, "NDMRESET should not affect DMI_COMMAND"); COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, "NDMRESET should not affect DMI_ABSTRACTCS"); COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == abstractauto, "NDMRESET should not affect DMI_ABSTRACTAUTO"); + + // Clean up to avoid future test failures + dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + dmi_write(target, DMI_ABSTRACTAUTO, 0); for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ testvar = (i + 1) * 0x11111111; From 3ec1772c9673b92d402321b8fa91d4b6eadb5cec Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 15 Aug 2017 15:55:09 -0700 Subject: [PATCH 17/53] riscv: Add commands for setting timeouts --- src/target/riscv/riscv-011.c | 47 +++++++++--------- src/target/riscv/riscv-013.c | 19 ++++---- src/target/riscv/riscv.c | 94 ++++++++++++++++++++++++++++-------- src/target/riscv/riscv.h | 9 ++++ 4 files changed, 118 insertions(+), 51 deletions(-) diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index b126cf6fc..6b6666b4d 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -39,26 +39,26 @@ * * There are a few functions to just instantly shift a register and get its * value: - * dtmcontrol_scan - * idcode_scan - * dbus_scan + * dtmcontrol_scan + * idcode_scan + * dbus_scan * * Because doing one scan and waiting for the result is slow, most functions * batch up a bunch of dbus writes and then execute them all at once. They use * the scans "class" for this: - * scans_new - * scans_delete - * scans_execute - * scans_add_... + * scans_new + * scans_delete + * scans_execute + * scans_add_... * Usually you new(), call a bunch of add functions, then execute() and look * at the results by calling scans_get...() * * Optimized functions will directly use the scans class above, but slightly * lazier code will use the cache functions that in turn use the scans * functions: - * cache_get... - * cache_set... - * cache_write + * cache_get... + * cache_set... + * cache_write * cache_set... update a local structure, which is then synced to the target * with cache_write(). Only Debug RAM words that are actually changed are sent * to the target. Afterwards use cache_get... to read results. @@ -80,10 +80,10 @@ #define CSR_BPCONTROL_BPMATCH (0xf<<7) #define CSR_BPCONTROL_BPACTION (0xff<<11) -#define DEBUG_ROM_START 0x800 -#define DEBUG_ROM_RESUME (DEBUG_ROM_START + 4) -#define DEBUG_ROM_EXCEPTION (DEBUG_ROM_START + 8) -#define DEBUG_RAM_START 0x400 +#define DEBUG_ROM_START 0x800 +#define DEBUG_ROM_RESUME (DEBUG_ROM_START + 4) +#define DEBUG_ROM_EXCEPTION (DEBUG_ROM_START + 8) +#define DEBUG_RAM_START 0x400 #define SETHALTNOT 0x10c @@ -154,7 +154,6 @@ typedef enum slot { /*** Info about the core being debugged. ***/ #define DBUS_ADDRESS_UNKNOWN 0xffff -#define WALL_CLOCK_TIMEOUT 2 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in // its source tree. We must interpret the numbers the same here. @@ -730,8 +729,9 @@ static int wait_for_debugint_clear(struct target *target, bool ignore_first) if (!bits.interrupt) { return ERROR_OK; } - if (time(NULL) - start > WALL_CLOCK_TIMEOUT) { - LOG_ERROR("Timed out waiting for debug int to clear."); + if (time(NULL) - start > riscv_command_timeout_sec) { + LOG_ERROR("Timed out waiting for debug int to clear." + "Increase timeout with riscv set_command_timeout_sec."); return ERROR_FAIL; } } @@ -864,7 +864,7 @@ static int cache_write(struct target *target, unsigned int address, bool run) if (last == info->dramsize) { // Nothing needs to be written to RAM. - dbus_write(target, DMCONTROL, DMCONTROL_HALTNOT | (run ? DMCONTROL_INTERRUPT : 0)); + dbus_write(target, DMCONTROL, DMCONTROL_HALTNOT | (run ? DMCONTROL_INTERRUPT : 0)); } else { for (unsigned int i = 0; i < info->dramsize; i++) { @@ -1016,8 +1016,9 @@ static int wait_for_state(struct target *target, enum target_state state) if (target->state == state) { return ERROR_OK; } - if (time(NULL) - start > WALL_CLOCK_TIMEOUT) { - LOG_ERROR("Timed out waiting for state %d.", state); + if (time(NULL) - start > riscv_command_timeout_sec) { + LOG_ERROR("Timed out waiting for state %d. " + "Increase timeout with riscv set_command_timeout_sec.", state); return ERROR_FAIL; } } @@ -1174,8 +1175,9 @@ static int full_step(struct target *target, bool announce) return result; if (target->state != TARGET_DEBUG_RUNNING) break; - if (time(NULL) - start > WALL_CLOCK_TIMEOUT) { - LOG_ERROR("Timed out waiting for step to complete."); + if (time(NULL) - start > riscv_command_timeout_sec) { + LOG_ERROR("Timed out waiting for step to complete." + "Increase timeout with riscv set_command_timeout_sec"); return ERROR_FAIL; } } @@ -1471,6 +1473,7 @@ static int init_target(struct command_context *cmd_ctx, riscv_info_t *generic_info = (riscv_info_t *) target->arch_info; generic_info->get_register = get_register; generic_info->set_register = set_register; + generic_info->version_specific = calloc(1, sizeof(riscv011_info_t)); if (!generic_info->version_specific) return ERROR_FAIL; diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index a45fcd3be..30b4d8d4f 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -122,9 +122,6 @@ typedef enum slot { /*** Info about the core being debugged. ***/ -#define WALL_CLOCK_TIMEOUT 2 -#define WALL_CLOCK_RESET_TIMEOUT 30 - struct trigger { uint64_t address; uint32_t length; @@ -563,7 +560,7 @@ static int wait_for_idle(struct target *target, uint32_t *abstractcs) return ERROR_OK; } - if (time(NULL) - start > WALL_CLOCK_TIMEOUT) { + if (time(NULL) - start > riscv_command_timeout_sec) { info->cmderr = get_field(*abstractcs, DMI_ABSTRACTCS_CMDERR); if (info->cmderr != CMDERR_NONE) { const char *errors[8] = { @@ -580,8 +577,10 @@ static int wait_for_idle(struct target *target, uint32_t *abstractcs) errors[info->cmderr], *abstractcs); } - LOG_ERROR("Timed out waiting for busy to go low. (abstractcs=0x%x)", - *abstractcs); + LOG_ERROR("Timed out after %ds waiting for busy to go low. (abstractcs=0x%x)" + "Increase the timeout with riscv set_command_timeout_sec.", + riscv_command_timeout_sec, + *abstractcs); return ERROR_FAIL; } } @@ -911,7 +910,7 @@ static int init_target(struct command_context *cmd_ctx, generic_info->dmi_write_u64_bits = &riscv013_dmi_write_u64_bits; generic_info->reset_current_hart = &riscv013_reset_current_hart; generic_info->test_compliance = &riscv013_test_compliance; - + generic_info->version_specific = calloc(1, sizeof(riscv013_info_t)); if (!generic_info->version_specific) return ERROR_FAIL; @@ -1894,9 +1893,11 @@ void riscv013_reset_current_hart(struct target *target) if (get_field(dmstatus, DMI_DMSTATUS_ALLHALTED)) { break; } - if (time(NULL) - start > WALL_CLOCK_RESET_TIMEOUT) { + if (time(NULL) - start > riscv_reset_timeout_sec) { LOG_ERROR("Hart didn't halt coming out of reset in %ds; " - "dmstatus=0x%x", WALL_CLOCK_RESET_TIMEOUT, dmstatus); + "dmstatus=0x%x" + "Increase the timeout with riscv set_reset_timeout_sec.", + riscv_reset_timeout_sec, dmstatus); return; } } diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index d6c2bbdaa..fca20215a 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -29,32 +29,32 @@ * Code structure * * At the bottom of the stack are the OpenOCD JTAG functions: - * jtag_add_[id]r_scan - * jtag_execute_query - * jtag_add_runtest + * jtag_add_[id]r_scan + * jtag_execute_query + * jtag_add_runtest * * There are a few functions to just instantly shift a register and get its * value: - * dtmcontrol_scan - * idcode_scan - * dbus_scan + * dtmcontrol_scan + * idcode_scan + * dbus_scan * * Because doing one scan and waiting for the result is slow, most functions * batch up a bunch of dbus writes and then execute them all at once. They use * the scans "class" for this: - * scans_new - * scans_delete - * scans_execute - * scans_add_... + * scans_new + * scans_delete + * scans_execute + * scans_add_... * Usually you new(), call a bunch of add functions, then execute() and look * at the results by calling scans_get...() * * Optimized functions will directly use the scans class above, but slightly * lazier code will use the cache functions that in turn use the scans * functions: - * cache_get... - * cache_set... - * cache_write + * cache_get... + * cache_set... + * cache_write * cache_set... update a local structure, which is then synced to the target * with cache_write(). Only Debug RAM words that are actually changed are sent * to the target. Afterwards use cache_get... to read results. @@ -77,8 +77,8 @@ #define CSR_BPCONTROL_BPACTION (0xff<<11) #define DEBUG_ROM_START 0x800 -#define DEBUG_ROM_RESUME (DEBUG_ROM_START + 4) -#define DEBUG_ROM_EXCEPTION (DEBUG_ROM_START + 8) +#define DEBUG_ROM_RESUME (DEBUG_ROM_START + 4) +#define DEBUG_ROM_EXCEPTION (DEBUG_ROM_START + 8) #define DEBUG_RAM_START 0x400 #define SETHALTNOT 0x10c @@ -150,7 +150,6 @@ typedef enum slot { /*** Info about the core being debugged. ***/ #define DBUS_ADDRESS_UNKNOWN 0xffff -#define WALL_CLOCK_TIMEOUT 2 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in // its source tree. We must interpret the numbers the same here. @@ -195,6 +194,12 @@ struct trigger { int unique_id; }; +/* Wall-clock timeout for a command/access. Settable via RISC-V Target commands.*/ +int riscv_command_timeout_sec = DEFAULT_COMMAND_TIMEOUT_SEC; + +/* Wall-clock timeout after reset. Settable via RISC-V Target commands.*/ +int riscv_reset_timeout_sec = DEFAULT_RESET_TIMEOUT_SEC; + static uint32_t dtmcontrol_scan(struct target *target, uint32_t out) { struct scan_field field; @@ -997,7 +1002,7 @@ int riscv_openocd_poll(struct target *target) /* If we're here then at least one hart triggered. That means * we want to go and halt _every_ hart in the system, as that's - * the invariant we hold here. Some harts might have already + * the invariant we hold here. Some harts might have already * halted (as we're either in single-step mode or they also * triggered a breakpoint), so don't attempt to halt those * harts. */ @@ -1171,7 +1176,7 @@ struct target_type riscv_target = .run_algorithm = riscv_run_algorithm, - .commands = riscv_command_handlers + .commands = riscv_command_handlers }; /*** RISC-V Interface ***/ @@ -1617,7 +1622,7 @@ COMMAND_HANDLER(riscv_test_compliance) { if (CMD_ARGC > 0) { LOG_ERROR("Command does not take any parameters."); - return ERROR_FAIL; + return ERROR_COMMAND_SYNTAX_ERROR; } if (r->test_compliance) { @@ -1626,16 +1631,65 @@ COMMAND_HANDLER(riscv_test_compliance) { LOG_ERROR("This target does not support this command (may implement an older version of the spec)."); return ERROR_FAIL; } + } +COMMAND_HANDLER(riscv_set_command_timeout_sec) { + + if (CMD_ARGC != 1) { + LOG_ERROR("Command takes exactly 1 parameter"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + int timeout = atoi(CMD_ARGV[0]); + if (timeout <= 0){ + LOG_ERROR("%s is not a valid integer argument for command.", CMD_ARGV[0]); + return ERROR_FAIL; + } + + riscv_command_timeout_sec = timeout; + + return ERROR_OK; +} + +COMMAND_HANDLER(riscv_set_reset_timeout_sec) { + + if (CMD_ARGC != 1) { + LOG_ERROR("Command takes exactly 1 parameter"); + return ERROR_COMMAND_SYNTAX_ERROR; + } + int timeout = atoi(CMD_ARGV[0]); + if (timeout <= 0){ + LOG_ERROR("%s is not a valid integer argument for command.", CMD_ARGV[0]); + return ERROR_FAIL; + } + + riscv_reset_timeout_sec = timeout; + return ERROR_OK; +} + + static const struct command_registration riscv_exec_command_handlers[] = { { .name = "test_compliance", .handler = riscv_test_compliance, .mode = COMMAND_EXEC, - .usage = "", + .usage = "riscv test_compliance", .help = "Runs a basic compliance test suite against the RISC-V Debug Spec." }, + { + .name = "set_command_timeout_sec", + .handler = riscv_set_command_timeout_sec, + .mode = COMMAND_ANY, + .usage = "riscv set_command_timeout_sec [sec]", + .help = "Set the wall-clock timeout (in seconds) for individual commands" + }, + { + .name = "set_reset_timeout_sec", + .handler = riscv_set_reset_timeout_sec, + .mode = COMMAND_ANY, + .usage = "riscv set_reset_timeout_sec [sec]", + .help = "Set the wall-clock timeout (in seconds) after reset is deasserted" + }, COMMAND_REGISTRATION_DONE }; diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index de0ebc505..e1110b19f 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -13,6 +13,9 @@ struct riscv_program; #define RISCV_MAX_TRIGGERS 32 #define RISCV_MAX_HWBPS 16 +#define DEFAULT_COMMAND_TIMEOUT_SEC 2 +#define DEFAULT_RESET_TIMEOUT_SEC 30 + extern struct target_type riscv011_target; extern struct target_type riscv013_target; @@ -104,6 +107,12 @@ typedef struct { int (*test_compliance)(struct target *target); } riscv_info_t; +/* Wall-clock timeout for a command/access. Settable via RISC-V Target commands.*/ +extern int riscv_command_timeout_sec; + +/* Wall-clock timeout after reset. Settable via RISC-V Target commands.*/ +extern int riscv_reset_timeout_sec; + /* Everything needs the RISC-V specific info structure, so here's a nice macro * that provides that. */ static inline riscv_info_t *riscv_info(const struct target *target) __attribute__((unused)); From 9f56a9643dea11bb8e2ff5be6db88b5b8ca4aae8 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 2 Nov 2017 09:34:43 -0700 Subject: [PATCH 18/53] riscv-compliance: remove some compile warnings --- src/target/riscv/riscv-013.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 9d39acbce..eeaacef8e 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2229,7 +2229,7 @@ int riscv013_test_compliance(struct target *target) { for (int i = 0; i < riscv_count_harts(target); i +=32){ uint32_t haltstat = dmi_read(target, 0x40 + (i / 32)); - uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFF : ((1 << (riscv_count_harts(target) % 32)) - 1); + uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFFU : ((1U << (riscv_count_harts(target) % 32)) - 1); COMPLIANCE_TEST(haltstat == haltstat_expected, "Halt Status Registers should report all halted harts."); } @@ -2276,7 +2276,6 @@ int riscv013_test_compliance(struct target *target) { // But at any rate, this is not legal and should cause an error. dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xAAAAAAAA, "COMMAND register should be R/W"); - uint32_t result = dmi_read(target, DMI_ABSTRACTCS); COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ "Illegal COMMAND should result in UNSUPPORTED"); dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); @@ -2291,7 +2290,7 @@ int riscv013_test_compliance(struct target *target) { uint32_t busy; command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3:2); command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1); - for (int i = 1 ; i < 32 ; i = i << 1) { + for (unsigned int i = 1 ; i < 32 ; i = i << 1) { command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_X0 + i); command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1); dmi_write(target, DMI_DATA0, i); @@ -2375,7 +2374,7 @@ int riscv013_test_compliance(struct target *target) { } // Core Register Tests - uint64_t bogus_dpc; + uint64_t bogus_dpc = 0xdeadbeef; for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ riscv_set_current_hartid(target, hartsel); @@ -2450,8 +2449,9 @@ int riscv013_test_compliance(struct target *target) { // verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be, // just verify that at least it's not the bogus value anymore. - uint64_t dpc = riscv_get_register(target, GDB_REGNO_DPC); + COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)"); COMPLIANCE_TEST(bogus_dpc != riscv_get_register(target, GDB_REGNO_DPC), "NDMRESET should move $DPC to reset value."); + COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); // DMACTIVE -- deasserting DMACTIVE should reset all the above values. From 41efb5b96480f23a9b81805117944d82f68ba710 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 13 Feb 2018 11:03:52 -0800 Subject: [PATCH 19/53] riscv-compliance: Fix libjaylink version --- src/jtag/drivers/libjaylink | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/jtag/drivers/libjaylink b/src/jtag/drivers/libjaylink index 699b7001d..8645845c1 160000 --- a/src/jtag/drivers/libjaylink +++ b/src/jtag/drivers/libjaylink @@ -1 +1 @@ -Subproject commit 699b7001d34a79c8e7064503dde1bede786fd7f0 +Subproject commit 8645845c1abebd004e991ba9a7f808f4fd0c608b From 88370b398911d67602627b20c85ec039c9dc9ed9 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 13 Feb 2018 11:44:53 -0800 Subject: [PATCH 20/53] riscv-compliance: fix some macros which were renamed --- src/target/riscv/riscv-013.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index cd4254c47..f6de5d80f 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2222,15 +2222,15 @@ int riscv013_test_compliance(struct target *target) { uint32_t dmcontrol_orig = dmi_read(target, DMI_DMCONTROL); uint32_t dmcontrol; uint32_t testvar; - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSEL, RISCV_MAX_HARTS-1); + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), RISCV_MAX_HARTS-1); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmcontrol = dmi_read(target, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSEL) == (RISCV_MAX_HARTS-1), "DMCONTROL.hartsel should hold MAX_HARTS - 1"); - - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSEL, 0); + COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == (RISCV_MAX_HARTS-1), "DMCONTROL.hartsel should hold all the harts allowed by HARTSELLEN."); + + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), 0); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmcontrol = dmi_read(target, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSEL) == 0, "DMCONTROL.hartsel should hold Hart ID 0"); + COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == 0, "DMCONTROL.hartsel should hold Hart ID 0"); // hartreset dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); @@ -2377,12 +2377,12 @@ int riscv013_test_compliance(struct target *target) { // Check that all reported ProgBuf words are really R/W for (int invert = 0; invert < 2; invert++) { - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; if (invert) {testvar = ~testvar;} dmi_write(target, DMI_PROGBUF0 + i, testvar); } - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; if (invert) {testvar = ~testvar;} COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == testvar, "All reported PROGBUF words must be R/W"); @@ -2473,7 +2473,7 @@ int riscv013_test_compliance(struct target *target) { dmi_read(target, DMI_PROGBUF0 + i); do { busy = get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_BUSY);} while (busy); if (autoexec_progbuf & (1 << i)) { - COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE), "AUTOEXEC may be writable up to PROGSIZE bits."); + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE), "AUTOEXEC may be writable up to PROGBUFSIZE bits."); testvar ++; } } @@ -2527,7 +2527,7 @@ int riscv013_test_compliance(struct target *target) { // Write some registers. They should not be impacted by ndmreset. dmi_write(target, DMI_COMMAND, 0xFFFFFFFF); - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; dmi_write(target, DMI_PROGBUF0 + i, testvar); } @@ -2557,7 +2557,7 @@ int riscv013_test_compliance(struct target *target) { dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); dmi_write(target, DMI_ABSTRACTAUTO, 0); - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == testvar, "PROGBUF words must not be affected by NDMRESET"); } @@ -2583,7 +2583,7 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0, "ABSTRACTCS.cmderr should reset to 0"); COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == 0, "ABSTRACTAUTO should reset to 0"); - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGSIZE); i ++){ + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == 0, "PROGBUF words should reset to 0"); } From 2e525e391fcb1fb838923a597d7a3493deae0794 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 13 Feb 2018 13:01:56 -0800 Subject: [PATCH 21/53] riscv-compliance: get it compiling against riscv branch again --- src/target/riscv/program.h | 4 +- src/target/riscv/riscv-013.c | 71 +++++++++++++++++------------------- 2 files changed, 35 insertions(+), 40 deletions(-) diff --git a/src/target/riscv/program.h b/src/target/riscv/program.h index d641be1be..310460c28 100644 --- a/src/target/riscv/program.h +++ b/src/target/riscv/program.h @@ -52,8 +52,8 @@ int riscv_program_insert(struct riscv_program *p, riscv_insn_t i); * memory. */ int riscv_program_save_to_dscratch(struct riscv_program *p, enum gdb_regno to_save); -/* Helpers to assembly various instructions. Return 0 on success. These might - * assembly into a multi-instruction sequence that overwrites some other +/* Helpers to assemble various instructions. Return 0 on success. These might + * assemble into a multi-instruction sequence that overwrites some other * register, but those will be properly saved and restored. */ int riscv_program_lwr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o); int riscv_program_lhr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o); diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index f6de5d80f..8564e7506 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2222,6 +2222,8 @@ int riscv013_test_compliance(struct target *target) { uint32_t dmcontrol_orig = dmi_read(target, DMI_DMCONTROL); uint32_t dmcontrol; uint32_t testvar; + riscv_reg_t value; + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), RISCV_MAX_HARTS-1); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmcontrol = dmi_read(target, DMI_DMCONTROL); @@ -2301,32 +2303,25 @@ int riscv013_test_compliance(struct target *target) { uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); for (unsigned int d = 0; d < nscratch; d++) { - for (testvar = 0x00112233; testvar != 0xDEAD ; testvar = testvar == 0x00112233 ? ~testvar : 0xDEAD ) { - - struct riscv_program program32; + //TODO: DSCRATCH CSRs should be 64-bit on 64-bit systems. + riscv_reg_t testval; + for (testval = 0x0011223300112233; testval != 0xDEAD ; testval = testval == 0x0011223300112233 ? ~testval : 0xDEAD ) { + COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, testval) == ERROR_OK, "Need to be able to write S0 in order to test DSCRATCH."); + struct riscv_program program32; riscv_program_init(&program32, target); - riscv_addr_t addr_in = riscv_program_alloc_x(&program32); - riscv_addr_t addr_out = riscv_program_alloc_x(&program32); - - riscv_program_write_ram(&program32, addr_in, testvar); - if (riscv_xlen(target) > 32) { - riscv_program_write_ram(&program32, addr_in + 4, testvar); - } - - riscv_program_lx(&program32, GDB_REGNO_S0, addr_in); - riscv_program_csrrw(&program32, GDB_REGNO_S0, GDB_REGNO_S0, GDB_REGNO_DSCRATCH); - riscv_program_csrrw(&program32, GDB_REGNO_S1, GDB_REGNO_S1, GDB_REGNO_DSCRATCH); - riscv_program_sx(&program32, GDB_REGNO_S1, addr_out); + riscv_program_csrw(&program32, GDB_REGNO_S0, GDB_REGNO_DSCRATCH + d); + riscv_program_csrr(&program32, GDB_REGNO_S1, GDB_REGNO_DSCRATCH + d); riscv_program_fence(&program32); - COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, "Accessing DSCRATCH with program buffer should succeed."); - - COMPLIANCE_TEST(riscv_program_read_ram(&program32, addr_out) == testvar, "All DSCRATCH registers in HARTINFO must be R/W."); + riscv_program_ebreak(&program32); + COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, "Accessing DSCRATCH with program buffer should succeed."); + COMPLIANCE_TEST(register_read_direct(target, &value, GDB_REGNO_S1) == ERROR_OK, "Need to be able to read S1 in order to test DSCRATCH."); if (riscv_xlen(target) > 32) { - COMPLIANCE_TEST(riscv_program_read_ram(&program32, addr_out + 4) == testvar, "All DSCRATCH registers in HARTINFO must be R/W."); - } + COMPLIANCE_TEST(value == testval, "All DSCRATCH registers in HARTINFO must be R/W."); + } else { + COMPLIANCE_TEST(value == (testval & 0xFFFFFFFF), "All DSCRATCH registers in HARTINFO must be R/W."); + } } } - // TODO: dataaccess if (get_field(hartinfo, DMI_HARTINFO_DATAACCESS)) { // TODO: Shadowed in memory map. @@ -2411,7 +2406,7 @@ int riscv013_test_compliance(struct target *target) { command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3:2); command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1); for (unsigned int i = 1 ; i < 32 ; i = i << 1) { - command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_X0 + i); + command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_ZERO + i); command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1); dmi_write(target, DMI_DATA0, i); if (riscv_xlen(target) > 32) { @@ -2442,18 +2437,13 @@ int riscv013_test_compliance(struct target *target) { testvar = 0; // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not // a true compliance requirement. + COMPLIANCE_TEST(riscv_set_register(target, GDB_REGNO_S0, 0) == ERROR_OK, "Need to be able to write S0 to test ABSTRACTAUTO"); struct riscv_program program; riscv_program_init(&program, target); - riscv_addr_t addr = riscv_program_alloc_x(&program); - riscv_program_lx(&program, GDB_REGNO_S0, addr); // Also testing that WFI() is a NOP during debug mode. riscv_program_insert(&program, wfi()); riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); - riscv_program_sx(&program, GDB_REGNO_S0, addr); - riscv_program_write_ram(&program, addr, 0); - if (riscv_xlen(target) > 32) { - riscv_program_write_ram(&program, addr+4, 0); - } + riscv_program_ebreak(&program); dmi_write(target, DMI_ABSTRACTAUTO, 0x0); riscv_program_exec(&program, target); testvar ++; @@ -2479,9 +2469,9 @@ int riscv013_test_compliance(struct target *target) { } dmi_write(target, DMI_ABSTRACTAUTO, 0); - int d_addr = (addr - riscv_debug_buffer_addr(target))/4 ; + riscv_get_register(target, &value, GDB_REGNO_S0); - COMPLIANCE_TEST(testvar == riscv_read_debug_buffer_x(target, d_addr), \ + COMPLIANCE_TEST(testvar == value, \ "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); } @@ -2500,20 +2490,24 @@ int riscv013_test_compliance(struct target *target) { // DCSR Tests riscv_set_register(target, GDB_REGNO_DCSR, 0x0); - COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DCSR) != 0, "Not all bits in DCSR are writable by Debugger"); + riscv_get_register(target, &value, GDB_REGNO_DCSR); + COMPLIANCE_TEST(value != 0, "Not all bits in DCSR are writable by Debugger"); riscv_set_register(target, GDB_REGNO_DCSR, 0xFFFFFFFF); - COMPLIANCE_TEST(riscv_get_register(target, GDB_REGNO_DCSR) != 0, "At least some bits in DCSR must be 1"); + riscv_get_register(target, &value, GDB_REGNO_DCSR); + COMPLIANCE_TEST(value != 0, "At least some bits in DCSR must be 1"); // DPC uint64_t testvar64 = 0xAAAAAAAAAAAAAAAAUL; - uint64_t dpcmask = 0xFFFFFFFFFFFFFFFFUL; + riscv_reg_t dpcmask = 0xFFFFFFFFFFFFFFFFUL; riscv_set_register(target, GDB_REGNO_DPC, dpcmask); - dpcmask = riscv_get_register(target, GDB_REGNO_DPC); + riscv_get_register(target, &dpcmask, GDB_REGNO_DPC); COMPLIANCE_TEST(dpcmask >= 0xFFFFFFFC, "DPC must hold the minimum for a virtual address (may tighten requirement later)."); riscv_set_register(target, GDB_REGNO_DPC, testvar64); - COMPLIANCE_TEST((riscv_get_register(target, GDB_REGNO_DPC) & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); + riscv_get_register(target, &value, GDB_REGNO_DPC); + COMPLIANCE_TEST((value & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); - uint64_t dpc = riscv_get_register(target, GDB_REGNO_DPC); + riscv_reg_t dpc; + riscv_get_register(target, &dpc, GDB_REGNO_DPC); COMPLIANCE_TEST((dpc & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); if (hartsel == 0) {bogus_dpc = dpc;} // For a later test step } @@ -2570,7 +2564,8 @@ int riscv013_test_compliance(struct target *target) { // verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be, // just verify that at least it's not the bogus value anymore. COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)"); - COMPLIANCE_TEST(bogus_dpc != riscv_get_register(target, GDB_REGNO_DPC), "NDMRESET should move $DPC to reset value."); + riscv_get_register(target, &value, GDB_REGNO_DPC); + COMPLIANCE_TEST(bogus_dpc != value, "NDMRESET should move DPC to reset value."); COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); From 313885cb3bf3278b7a6600a942c7d13b984580c6 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 13 Feb 2018 13:06:44 -0800 Subject: [PATCH 22/53] riscv-compliance: whitespace fixes --- src/target/riscv/riscv-013.c | 64 +++++++++++++++++------------------- src/target/riscv/riscv.c | 2 +- 2 files changed, 32 insertions(+), 34 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8564e7506..c6f60b3c1 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1975,7 +1975,7 @@ static int riscv013_halt_current_hart(struct target *target) /* Issue the halt command, and then wait for the current hart to halt. */ uint32_t dmcontrol = dmi_read(target, DMI_DMCONTROL); - dmcontrol |= DMI_DMCONTROL_HALTREQ; + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HALTREQ, 1); dmi_write(target, DMI_DMCONTROL, dmcontrol); for (size_t i = 0; i < 256; ++i) if (riscv_is_halted(target)) @@ -1991,7 +1991,7 @@ static int riscv013_halt_current_hart(struct target *target) return ERROR_FAIL; } - dmcontrol &= ~DMI_DMCONTROL_HALTREQ; + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_HALTREQ, 0); dmi_write(target, DMI_DMCONTROL, dmcontrol); return ERROR_OK; @@ -2207,7 +2207,7 @@ void riscv013_clear_abstract_error(struct target *target) assert(pass); \ total_tests ++; \ } - + int riscv013_test_compliance(struct target *target) { LOG_INFO("Testing Compliance against RISC-V Debug Spec v0.13"); @@ -2223,12 +2223,12 @@ int riscv013_test_compliance(struct target *target) { uint32_t dmcontrol; uint32_t testvar; riscv_reg_t value; - + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), RISCV_MAX_HARTS-1); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmcontrol = dmi_read(target, DMI_DMCONTROL); COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == (RISCV_MAX_HARTS-1), "DMCONTROL.hartsel should hold all the harts allowed by HARTSELLEN."); - + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), 0); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmcontrol = dmi_read(target, DMI_DMCONTROL); @@ -2254,9 +2254,7 @@ int riscv013_test_compliance(struct target *target) { dmcontrol = dmi_read(target, DMI_DMCONTROL); COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HASEL)) == 0), "DMCONTROL.hasel can be 0 or RW."); //TODO: test that hamask registers exist if hasel does. - - // TODO: ndmreset - + // haltreq riscv_halt_all_harts(target); // Writing haltreq should not cause any problems for a halted hart, but we @@ -2279,7 +2277,7 @@ int riscv013_test_compliance(struct target *target) { do { dmstatus = dmi_read(target, DMI_DMSTATUS); } while (get_field(dmstatus, DMI_DMSTATUS_ALLRESUMEACK) == 0); - + // Halt the hart again because the target isn't aware that we resumed it. dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 0); dmcontrol |= DMI_DMCONTROL_HALTREQ; @@ -2291,15 +2289,15 @@ int riscv013_test_compliance(struct target *target) { dmi_write(target, DMI_DMCONTROL, dmcontrol); // Not clear that this read is required according to the spec. dmi_read(target, DMI_DMSTATUS); - + // HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++){ riscv_set_current_hartid(target, hartsel); - + uint32_t hartinfo = dmi_read(target, DMI_HARTINFO); dmi_write (target, DMI_HARTINFO, ~hartinfo); COMPLIANCE_TEST((dmi_read(target, DMI_HARTINFO) == hartinfo), "DMHARTINFO should be Read-Only."); - + uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); for (unsigned int d = 0; d < nscratch; d++) { @@ -2332,7 +2330,7 @@ int riscv013_test_compliance(struct target *target) { // TODO: datasize // TODO: dataaddr } - + } // HALTSUM @@ -2349,7 +2347,7 @@ int riscv013_test_compliance(struct target *target) { } // TODO: HAWINDOWSEL - + // TODO: HAWINDOW // ABSTRACTCS @@ -2369,7 +2367,7 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "All reported DATA words must be R/W"); } } - + // Check that all reported ProgBuf words are really R/W for (int invert = 0; invert < 2; invert++) { for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ @@ -2387,7 +2385,7 @@ int riscv013_test_compliance(struct target *target) { // TODO: Cause and clear all error types // COMMAND - // TODO: Unclear from the spec whether all these bits need to truly be R/W. + // TODO: Unclear from the spec whether all these bits need to truly be R/W. // But at any rate, this is not legal and should cause an error. dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0xAAAAAAAA, "COMMAND register should be R/W"); @@ -2428,14 +2426,14 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + 1) == (i + 1), "GPR Reads and writes should be supported."); } } - + // ABSTRACTAUTO // See which bits are actually writable dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); uint32_t abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); if (abstractauto > 0) { testvar = 0; - // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not + // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not // a true compliance requirement. COMPLIANCE_TEST(riscv_set_register(target, GDB_REGNO_S0, 0) == ERROR_OK, "Need to be able to write S0 to test ABSTRACTAUTO"); struct riscv_program program; @@ -2470,11 +2468,11 @@ int riscv013_test_compliance(struct target *target) { dmi_write(target, DMI_ABSTRACTAUTO, 0); riscv_get_register(target, &value, GDB_REGNO_S0); - + COMPLIANCE_TEST(testvar == value, \ "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); } - + // Single-Step each hart. for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ riscv_set_current_hartid(target, hartsel); @@ -2482,7 +2480,7 @@ int riscv013_test_compliance(struct target *target) { riscv013_step_current_hart(target); COMPLIANCE_TEST(riscv_halt_reason(target, hartsel) == RISCV_HALT_SINGLESTEP, "Single Step should result in SINGLESTEP"); } - + // Core Register Tests uint64_t bogus_dpc = 0xdeadbeef; for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ @@ -2511,21 +2509,21 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST((dpc & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); if (hartsel == 0) {bogus_dpc = dpc;} // For a later test step } - + //NDMRESET // NDMRESET // Asserting non-debug module reset should not reset Debug Module state. // But it should reset Hart State, e.g. DPC should get a different value. // Also make sure that DCSR reports cause of 'HALT' even though previously we single-stepped. - + // Write some registers. They should not be impacted by ndmreset. dmi_write(target, DMI_COMMAND, 0xFFFFFFFF); - + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; dmi_write(target, DMI_PROGBUF0 + i, testvar); } - + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ testvar = (i + 1) * 0x11111111; dmi_write(target, DMI_DATA0 + i, testvar); @@ -2535,7 +2533,7 @@ int riscv013_test_compliance(struct target *target) { abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); // Pulse reset. - + target->reset_halt = true; dmcontrol = dmi_read(target, DMI_DMCONTROL); riscv_set_current_hartid(target, 0); @@ -2550,12 +2548,12 @@ int riscv013_test_compliance(struct target *target) { // Clean up to avoid future test failures dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); dmi_write(target, DMI_ABSTRACTAUTO, 0); - + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == testvar, "PROGBUF words must not be affected by NDMRESET"); } - + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == testvar, "DATA words must not be affected by NDMRESET"); @@ -2566,23 +2564,23 @@ int riscv013_test_compliance(struct target *target) { COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)"); riscv_get_register(target, &value, GDB_REGNO_DPC); COMPLIANCE_TEST(bogus_dpc != value, "NDMRESET should move DPC to reset value."); - + COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); - + // DMACTIVE -- deasserting DMACTIVE should reset all the above values. - + // Toggle dmactive dmi_write(target, DMI_DMCONTROL, 0); dmi_write(target, DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE); COMPLIANCE_TEST(dmi_read(target, DMI_COMMAND) == 0, "DMI_COMMAND should reset to 0"); COMPLIANCE_TEST(get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0, "ABSTRACTCS.cmderr should reset to 0"); COMPLIANCE_TEST(dmi_read(target, DMI_ABSTRACTAUTO) == 0, "ABSTRACTAUTO should reset to 0"); - + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_PROGBUF0 + i) == 0, "PROGBUF words should reset to 0"); } - + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ testvar = (i + 1) * 0x11111111; COMPLIANCE_TEST(dmi_read(target, DMI_DATA0 + i) == 0, "DATA words should reset to 0"); diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index f6ad20e95..2b5e89f9f 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1286,7 +1286,7 @@ static const struct command_registration riscv_exec_command_handlers[] = { { .name = "test_compliance", .handler = riscv_test_compliance, - .mode = COMMAND_EXEC, + .mode = COMMAND_EXEC, .usage = "riscv test_compliance", .help = "Runs a basic compliance test suite against the RISC-V Debug Spec." }, From 8f7195af76dd5ba048e6d82758ff21a24b660d01 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 13 Feb 2018 13:47:14 -0800 Subject: [PATCH 23/53] riscv-compliance: Turn off ABSTRACTAUTO until the appropriate time --- src/target/riscv/riscv-013.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index c6f60b3c1..74abfc57c 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2431,6 +2431,7 @@ int riscv013_test_compliance(struct target *target) { // See which bits are actually writable dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); uint32_t abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); + dmi_write(target, DMI_ABSTRACTAUTO, 0x0); if (abstractauto > 0) { testvar = 0; // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not From 1b37f60969fb6a0df99fc16c7370a3499a9fa31d Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 13 Feb 2018 15:02:31 -0800 Subject: [PATCH 24/53] riscv-compliance: Check that DPC is sign extended properly. --- src/target/riscv/riscv-013.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 74abfc57c..68f6b3ba1 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2495,19 +2495,23 @@ int riscv013_test_compliance(struct target *target) { riscv_get_register(target, &value, GDB_REGNO_DCSR); COMPLIANCE_TEST(value != 0, "At least some bits in DCSR must be 1"); - // DPC - uint64_t testvar64 = 0xAAAAAAAAAAAAAAAAUL; - riscv_reg_t dpcmask = 0xFFFFFFFFFFFFFFFFUL; - riscv_set_register(target, GDB_REGNO_DPC, dpcmask); - riscv_get_register(target, &dpcmask, GDB_REGNO_DPC); - COMPLIANCE_TEST(dpcmask >= 0xFFFFFFFC, "DPC must hold the minimum for a virtual address (may tighten requirement later)."); - riscv_set_register(target, GDB_REGNO_DPC, testvar64); - riscv_get_register(target, &value, GDB_REGNO_DPC); - COMPLIANCE_TEST((value & dpcmask) == (testvar64 & dpcmask), "DPC must be writable."); - riscv_set_register(target, GDB_REGNO_DPC, ~testvar64); + // DPC. Note that DPC is sign-extended. + riscv_reg_t dpcmask = 0xFFFFFFFCUL; riscv_reg_t dpc; + + if (riscv_xlen(target) > 32) { + dpcmask |= (0xFFFFFFFFUL << 32); + } + if (riscv_supports_extension(target, 'C')){ + dpcmask |= 0x2; + } + + riscv_set_register(target, GDB_REGNO_DPC, dpcmask); riscv_get_register(target, &dpc, GDB_REGNO_DPC); - COMPLIANCE_TEST((dpc & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable"); + COMPLIANCE_TEST(dpcmask == dpc, "DPC must be sign-extended to XLEN and writable to all-1s (except the least significant bits)"); + riscv_set_register(target, GDB_REGNO_DPC, 0); + riscv_get_register(target, &dpc, GDB_REGNO_DPC); + COMPLIANCE_TEST(dpc == 0, "DPC must be writable to 0."); if (hartsel == 0) {bogus_dpc = dpc;} // For a later test step } From 7eca2dfe5de5ddfb0230a424ab8e86c8f70c460d Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 12 Apr 2018 15:02:04 -0700 Subject: [PATCH 25/53] Squashed commit of the following: commit fb7009fc38eff2f169385589e0f71ca4f9626cb2 Author: Gleb Gagarin Date: Fri Feb 23 16:41:14 2018 -0800 Make some error messages to be printed once commit e09dd62229bd2c152bf403e601aa098e29aaa850 Author: Gleb Gagarin Date: Fri Feb 23 15:30:10 2018 -0800 Reduce severity of the error messages that are polluting the log commit 73b6ea55ebefd004bef71359d611d3a887b89983 Author: Gleb Gagarin Date: Fri Feb 23 13:32:54 2018 -0800 removed unused variable commit c3bdcb0c4ae63bb5afad628c58eb29fe43c9646d Author: Gleb Gagarin Date: Thu Feb 22 18:32:08 2018 -0800 more R/O checks commit 353cf212bd892bbb065e6a57fb9412cc8fea0548 Author: Gleb Gagarin Date: Thu Feb 22 14:27:25 2018 -0800 write progbuf via DMI commit e73d82e3d6cf064d0323e3c686f3b7710f42a51f Author: Gleb Gagarin Date: Wed Feb 21 18:47:36 2018 -0800 add writes to progbuf commit f97e4b53e4064ae4e7807a1aac74c5d92aea7666 Author: Gleb Gagarin Date: Wed Feb 21 16:20:12 2018 -0800 Try to zero out ROM --- src/target/riscv/riscv-013.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 68f6b3ba1..0879d51e6 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -383,7 +383,11 @@ static dmi_status_t dmi_scan(struct target *target, uint16_t *address_in, int retval = jtag_execute_queue(); if (retval != ERROR_OK) { - LOG_ERROR("dmi_scan failed jtag scan"); + static int once = 1; + if (once) { + LOG_ERROR("dmi_scan failed jtag scan"); + once = 0; + } return DMI_STATUS_FAILED; } @@ -418,13 +422,22 @@ static uint32_t dmi_read(struct target *target, uint16_t address) } else if (status == DMI_STATUS_SUCCESS) { break; } else { - LOG_ERROR("failed read from 0x%x, status=%d", address, status); + static int once = 1; + if (once) { + LOG_ERROR("failed read from 0x%x, status=%d", address, status); + once = 0; + } break; } + usleep(100000); } if (status != DMI_STATUS_SUCCESS) { - LOG_ERROR("Failed read from 0x%x; status=%d", address, status); + static int once = 1; + if (once) { + LOG_INFO("Failed read from 0x%x; status=%d", address, status); + once = 0; + } return ~0; } @@ -2268,6 +2281,9 @@ int riscv013_test_compliance(struct target *target) { dmstatus = dmi_read(target, DMI_DMSTATUS); } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); + dmi_write(target, DMI_DMSTATUS, 0xffffffff); + COMPLIANCE_TEST(dmi_read(target, DMI_DMSTATUS) == dmstatus, "DMSTATUS is R/O"); + // resumereq. This will resume the hart but this test is destructive anyway. dmcontrol &= ~DMI_DMCONTROL_HALTREQ; dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 1); @@ -2340,6 +2356,12 @@ int riscv013_test_compliance(struct target *target) { } COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM should report all halted harts"); + dmi_write(target, DMI_HALTSUM, 0xffffffff); + COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM is R/O"); + + dmi_write(target, DMI_HALTSUM, 0x0); + COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM is R/O"); + for (int i = 0; i < riscv_count_harts(target); i +=32){ uint32_t haltstat = dmi_read(target, 0x40 + (i / 32)); uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFFU : ((1U << (riscv_count_harts(target) % 32)) - 1); From 415da7ed4e7d55a03c076d0170f6fecfe5845811 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 12 Apr 2018 16:06:30 -0700 Subject: [PATCH 26/53] riscv: update definitions to meet current version of spec --- src/target/riscv/debug_defines.h | 193 ++++++++++++------------------- 1 file changed, 75 insertions(+), 118 deletions(-) diff --git a/src/target/riscv/debug_defines.h b/src/target/riscv/debug_defines.h index 04500e572..17b144410 100644 --- a/src/target/riscv/debug_defines.h +++ b/src/target/riscv/debug_defines.h @@ -343,6 +343,16 @@ #define CSR_MCONTROL_MASKMAX_LENGTH 6 #define CSR_MCONTROL_MASKMAX (0x3fULL << CSR_MCONTROL_MASKMAX_OFFSET) /* +* If this optional bit is implemented, the hardware sets it when this +* trigger matches. The trigger's user can set or clear it at any +* time. The trigger's user can use this bit to determine which +* trigger(s) matched. If the bit is not implemented, it is always 0 +* and writing it has no effect. + */ +#define CSR_MCONTROL_HIT_OFFSET 20 +#define CSR_MCONTROL_HIT_LENGTH 1 +#define CSR_MCONTROL_HIT (0x1ULL << CSR_MCONTROL_HIT_OFFSET) +/* * 0: Perform a match on the virtual address. * * 1: Perform a match on the data value loaded/stored, or the @@ -368,7 +378,7 @@ * which case the debugger has a little more control. * * Data load triggers with \Ftiming of 0 will result in the same load -* happening again when the debugger lets the core run. For data load +* happening again when the debugger lets the hart run. For data load * triggers, debuggers must first attempt to set the breakpoint with * \Ftiming of 1. * @@ -479,6 +489,16 @@ #define CSR_ICOUNT_DMODE_LENGTH 1 #define CSR_ICOUNT_DMODE (0x1ULL << CSR_ICOUNT_DMODE_OFFSET) /* +* If this optional bit is implemented, the hardware sets it when this +* trigger matches. The trigger's user can set or clear it at any +* time. The trigger's user can use this bit to determine which +* trigger(s) matched. If the bit is not implemented, it is always 0 +* and writing it has no effect. + */ +#define CSR_ICOUNT_HIT_OFFSET 24 +#define CSR_ICOUNT_HIT_LENGTH 1 +#define CSR_ICOUNT_HIT (0x1ULL << CSR_ICOUNT_HIT_OFFSET) +/* * When count is decremented to 0, the trigger fires. Instead of * changing \Fcount from 1 to 0, it is also acceptable for hardware to * clear \Fm, \Fs, and \Fu. This allows \Fcount to be hard-wired @@ -674,7 +694,7 @@ */ #define DMI_DMCONTROL_HALTREQ_OFFSET 31 #define DMI_DMCONTROL_HALTREQ_LENGTH 1 -#define DMI_DMCONTROL_HALTREQ (0x1ULL << DMI_DMCONTROL_HALTREQ_OFFSET) +#define DMI_DMCONTROL_HALTREQ (0x1U << DMI_DMCONTROL_HALTREQ_OFFSET) /* * Writes the resume request bit for all currently selected harts. * When set to 1, each selected hart will resume if it is currently @@ -687,7 +707,7 @@ */ #define DMI_DMCONTROL_RESUMEREQ_OFFSET 30 #define DMI_DMCONTROL_RESUMEREQ_LENGTH 1 -#define DMI_DMCONTROL_RESUMEREQ (0x1ULL << DMI_DMCONTROL_RESUMEREQ_OFFSET) +#define DMI_DMCONTROL_RESUMEREQ (0x1U << DMI_DMCONTROL_RESUMEREQ_OFFSET) /* * This optional field writes the reset bit for all the currently * selected harts. To perform a reset the debugger writes 1, and then @@ -701,7 +721,7 @@ */ #define DMI_DMCONTROL_HARTRESET_OFFSET 29 #define DMI_DMCONTROL_HARTRESET_LENGTH 1 -#define DMI_DMCONTROL_HARTRESET (0x1ULL << DMI_DMCONTROL_HARTRESET_OFFSET) +#define DMI_DMCONTROL_HARTRESET (0x1U << DMI_DMCONTROL_HARTRESET_OFFSET) /* * Writing 1 to this bit clears the {\tt havereset} bits for * any selected harts. @@ -710,7 +730,7 @@ */ #define DMI_DMCONTROL_ACKHAVERESET_OFFSET 28 #define DMI_DMCONTROL_ACKHAVERESET_LENGTH 1 -#define DMI_DMCONTROL_ACKHAVERESET (0x1ULL << DMI_DMCONTROL_ACKHAVERESET_OFFSET) +#define DMI_DMCONTROL_ACKHAVERESET (0x1U << DMI_DMCONTROL_ACKHAVERESET_OFFSET) /* * Selects the definition of currently selected harts. * @@ -720,20 +740,27 @@ * plus those selected by the hart array mask register. * * An implementation which does not implement the hart array mask register -* should tie this field to 0. A debugger which wishes to use the hart array +* must tie this field to 0. A debugger which wishes to use the hart array * mask register feature should set this bit and read back to see if the functionality * is supported. */ #define DMI_DMCONTROL_HASEL_OFFSET 26 #define DMI_DMCONTROL_HASEL_LENGTH 1 -#define DMI_DMCONTROL_HASEL (0x1ULL << DMI_DMCONTROL_HASEL_OFFSET) +#define DMI_DMCONTROL_HASEL (0x1U << DMI_DMCONTROL_HASEL_OFFSET) /* -* The DM-specific index of the hart to select. This hart is always part of the -* currently selected harts. +* The low 10 bits of \Fhartsel: the DM-specific index of the hart to +* select. This hart is always part of the currently selected harts. */ -#define DMI_DMCONTROL_HARTSEL_OFFSET 16 -#define DMI_DMCONTROL_HARTSEL_LENGTH HARTSELLEN -#define DMI_DMCONTROL_HARTSEL (((1L< Date: Thu, 12 Apr 2018 16:10:45 -0700 Subject: [PATCH 27/53] riscv: hartsel-> hartsello (not supporting hartselhi yet) --- src/target/riscv/riscv-013.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8b16a4e97..684ea0e4c 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -264,7 +264,7 @@ static dm013_info_t *get_dm(struct target *target) static uint32_t hartsel_mask(const struct target *target) { RISCV013_INFO(info); - return ((1L<hartsellen)-1) << DMI_DMCONTROL_HARTSEL_OFFSET; + return ((1L<hartsellen)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET; } static void decode_dmi(char *text, unsigned address, unsigned data) @@ -278,7 +278,7 @@ static void decode_dmi(char *text, unsigned address, unsigned data) { DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" }, { DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" }, - { DMI_DMCONTROL, ((1L<<10)-1) << DMI_DMCONTROL_HARTSEL_OFFSET, "hartsel" }, + { DMI_DMCONTROL, ((1L<<10)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET, "hartsel" }, { DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" }, @@ -1290,7 +1290,7 @@ static int examine(struct target *target) dm->was_reset = true; } - uint32_t max_hartsel_mask = ((1L<<10)-1) << DMI_DMCONTROL_HARTSEL_OFFSET; + uint32_t max_hartsel_mask = ((1L<<10)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET; dmi_write(target, DMI_DMCONTROL, max_hartsel_mask | DMI_DMCONTROL_DMACTIVE); uint32_t dmcontrol; if (dmi_read(target, &dmcontrol, DMI_DMCONTROL) != ERROR_OK) From ff365173a0808477a879ae37464a1592c48a204b Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 12 Apr 2018 17:31:23 -0700 Subject: [PATCH 28/53] riscv-compliance: fix too-narrow constant --- src/target/riscv/riscv-013.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 684ea0e4c..8b94e77a9 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3294,7 +3294,7 @@ int riscv013_test_compliance(struct target *target) { riscv_reg_t dpc; if (riscv_xlen(target) > 32) { - dpcmask |= (0xFFFFFFFFUL << 32); + dpcmask |= (0xFFFFFFFFULL << 32); } if (riscv_supports_extension(target, riscv_current_hartid(target), 'C')){ dpcmask |= 0x2; From 4c39ed9d7f6fda344a944d5e91fb7b12af912ae1 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Fri, 13 Apr 2018 17:02:34 -0700 Subject: [PATCH 29/53] Enforce OpenOCD style guide. Change-Id: I579a9f54ed22a774bf52f6aa5bc13bcbd2e82cd8 --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index 37a599339..aed8bd2a4 100644 --- a/.travis.yml +++ b/.travis.yml @@ -50,5 +50,6 @@ matrix: - binutils-mingw-w64-i686 gcc-mingw-w64-i686 g++-mingw-w64-i686 script: + - git diff `git merge-base master HEAD` | ./tools/scripts/checkpatch.pl - - ./bootstrap && ./configure --enable-remote-bitbang --enable-jtag_vpi $CONFIGURE_ARGS && make - file src/$EXECUTABLE From 9cb2c56dc10528c1d44658b34459f93d0a375da0 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Mon, 16 Apr 2018 13:17:09 -0700 Subject: [PATCH 30/53] Fail if `git diff` fails Change-Id: I57256b0a24247f6123cb0e25a89c1b59867cb3f9 --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index aed8bd2a4..a8b919cca 100644 --- a/.travis.yml +++ b/.travis.yml @@ -50,6 +50,7 @@ matrix: - binutils-mingw-w64-i686 gcc-mingw-w64-i686 g++-mingw-w64-i686 script: + - set -o pipefail - git diff `git merge-base master HEAD` | ./tools/scripts/checkpatch.pl - - ./bootstrap && ./configure --enable-remote-bitbang --enable-jtag_vpi $CONFIGURE_ARGS && make - file src/$EXECUTABLE From bc32aaafa4590bc2f0753b3dcab6b53f57915ddf Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Mon, 16 Apr 2018 17:49:16 -0700 Subject: [PATCH 31/53] riscv-compliance: whitespace cleanup --- src/target/riscv/riscv.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 4d0a0b00e..3b91fad21 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1208,22 +1208,21 @@ COMMAND_HANDLER(riscv_set_reset_timeout_sec) COMMAND_HANDLER(riscv_test_compliance) { - struct target *target = get_current_target(CMD_CTX); + struct target *target = get_current_target(CMD_CTX); - RISCV_INFO(r); + RISCV_INFO(r); - if (CMD_ARGC > 0) { - LOG_ERROR("Command does not take any parameters."); - return ERROR_COMMAND_SYNTAX_ERROR; - } - - if (r->test_compliance) { - return r->test_compliance(target); - } else { - LOG_ERROR("This target does not support this command (may implement an older version of the spec)."); - return ERROR_FAIL; - } + if (CMD_ARGC > 0) { + LOG_ERROR("Command does not take any parameters."); + return ERROR_COMMAND_SYNTAX_ERROR; + } + if (r->test_compliance) { + return r->test_compliance(target); + } else { + LOG_ERROR("This target does not support this command (may implement an older version of the spec)."); + return ERROR_FAIL; + } } COMMAND_HANDLER(riscv_set_scratch_ram) @@ -1237,7 +1236,7 @@ COMMAND_HANDLER(riscv_set_scratch_ram) return ERROR_OK; } - // TODO: use COMMAND_PARSE_NUMBER + /** TODO: use COMMAND_PARSE_NUMBER **/ long long unsigned int address; int result = sscanf(CMD_ARGV[0], "%llx", &address); if (result != (int) strlen(CMD_ARGV[0])) { From fa99b8e3b125e1c47af9185fd6cdb9fde3d2b199 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 07:49:06 -0700 Subject: [PATCH 32/53] riscv-compliance: Fix OpenOCD lint checks --- src/target/riscv/riscv-013.c | 986 ++++++++++++++++++----------------- 1 file changed, 507 insertions(+), 479 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8b94e77a9..8199750d7 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1501,7 +1501,7 @@ static int init_target(struct command_context *cmd_ctx, generic_info->dmi_read = &dmi_read; generic_info->dmi_write = &dmi_write; generic_info->test_compliance = &riscv013_test_compliance; - generic_info->version_specific = calloc(1, sizeof(riscv013_info_t)); + generic_info->version_specific = calloc(1, sizeof(riscv013_info_t)); if (!generic_info->version_specific) return ERROR_FAIL; riscv013_info_t *info = get_info(target); @@ -2934,482 +2934,510 @@ void riscv013_clear_abstract_error(struct target *target) dmi_write(target, DMI_ABSTRACTCS, abstractcs & DMI_ABSTRACTCS_CMDERR); } -#define COMPLIANCE_TEST(b, message) { \ - int pass = 0; \ - if (b) { \ - pass = 1; \ - passed_tests ++; \ - } \ - LOG_INFO("%s test %d (%s)\n", (pass) ? "PASSED":"FAILED", total_tests, message); \ - assert(pass); \ - total_tests ++; \ - } - -int riscv013_test_compliance(struct target *target) { - LOG_INFO("Testing Compliance against RISC-V Debug Spec v0.13"); - - if (!riscv_rtos_enabled(target)) { - LOG_ERROR("Please run with -rtos riscv to run compliance test."); - return ERROR_FAIL; - } - - int total_tests = 0; - int passed_tests = 0; - - uint32_t dmcontrol_orig; - dmi_read(target, &dmcontrol_orig, DMI_DMCONTROL); - uint32_t dmcontrol; - uint32_t testvar; - uint32_t testvar_read; - riscv_reg_t value; - - dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), RISCV_MAX_HARTS-1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == (RISCV_MAX_HARTS-1), "DMCONTROL.hartsel should hold all the harts allowed by HARTSELLEN."); - - dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), 0); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == 0, "DMCONTROL.hartsel should hold Hart ID 0"); - - // hartreset - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - testvar = get_field(dmcontrol, DMI_DMCONTROL_HARTRESET); - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HARTRESET)) == 0), "DMCONTROL.hartreset can be 0 or RW."); - - // hasel - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - testvar = get_field(dmcontrol, DMI_DMCONTROL_HASEL); - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HASEL)) == 0), "DMCONTROL.hasel can be 0 or RW."); - //TODO: test that hamask registers exist if hasel does. - - // haltreq - riscv_halt_all_harts(target); - // Writing haltreq should not cause any problems for a halted hart, but we - // should be able to read and write it. - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - dmcontrol |= DMI_DMCONTROL_HALTREQ; - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(dmcontrol & DMI_DMCONTROL_HALTREQ, "DMCONTROL.haltreq should be R/W"); - uint32_t dmstatus, dmstatus_read; - do { - dmi_read(target, &dmstatus, DMI_DMSTATUS); - } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); - - dmi_write(target, DMI_DMSTATUS, 0xffffffff); - dmi_read(target, &dmstatus_read, DMI_DMSTATUS); - COMPLIANCE_TEST(dmstatus_read == dmstatus, "DMSTATUS is R/O"); - - // resumereq. This will resume the hart but this test is destructive anyway. - dmcontrol &= ~DMI_DMCONTROL_HALTREQ; - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ) == 1, "DMCONTROL.resumereq should be R/W"); - - do { - dmi_read(target, &dmstatus, DMI_DMSTATUS); - } while (get_field(dmstatus, DMI_DMSTATUS_ALLRESUMEACK) == 0); - - // Halt the hart again because the target isn't aware that we resumed it. - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 0); - dmcontrol |= DMI_DMCONTROL_HALTREQ; - dmi_write(target, DMI_DMCONTROL, dmcontrol); - do { - dmi_read(target, &dmstatus, DMI_DMSTATUS); - } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); - dmcontrol &= ~DMI_DMCONTROL_HALTREQ; - dmi_write(target, DMI_DMCONTROL, dmcontrol); - // Not clear that this read is required according to the spec. - dmi_read(target, &dmstatus, DMI_DMSTATUS); - - // HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. - for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++){ - riscv_set_current_hartid(target, hartsel); - - uint32_t hartinfo, hartinfo_read; - dmi_read(target, &hartinfo, DMI_HARTINFO); - dmi_write(target, DMI_HARTINFO, ~hartinfo); - dmi_read(target, &hartinfo_read, DMI_HARTINFO); - COMPLIANCE_TEST((hartinfo_read == hartinfo), "DMHARTINFO should be Read-Only."); - - uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); - for (unsigned int d = 0; d < nscratch; d++) { - - //TODO: DSCRATCH CSRs should be 64-bit on 64-bit systems. - riscv_reg_t testval; - for (testval = 0x0011223300112233; testval != 0xDEAD ; testval = testval == 0x0011223300112233 ? ~testval : 0xDEAD ) { - COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, testval) == ERROR_OK, "Need to be able to write S0 in order to test DSCRATCH."); - struct riscv_program program32; - riscv_program_init(&program32, target); - riscv_program_csrw(&program32, GDB_REGNO_S0, GDB_REGNO_DSCRATCH + d); - riscv_program_csrr(&program32, GDB_REGNO_S1, GDB_REGNO_DSCRATCH + d); - riscv_program_fence(&program32); - riscv_program_ebreak(&program32); - COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, "Accessing DSCRATCH with program buffer should succeed."); - COMPLIANCE_TEST(register_read_direct(target, &value, GDB_REGNO_S1) == ERROR_OK, "Need to be able to read S1 in order to test DSCRATCH."); - if (riscv_xlen(target) > 32) { - COMPLIANCE_TEST(value == testval, "All DSCRATCH registers in HARTINFO must be R/W."); - } else { - COMPLIANCE_TEST(value == (testval & 0xFFFFFFFF), "All DSCRATCH registers in HARTINFO must be R/W."); - } - } - } - // TODO: dataaccess - if (get_field(hartinfo, DMI_HARTINFO_DATAACCESS)) { - // TODO: Shadowed in memory map. - // TODO: datasize - // TODO: dataaddr - } else { - // TODO: Shadowed in CSRs. - // TODO: datasize - // TODO: dataaddr - } - - } - - // HALTSUM -- TODO: More than 32 harts - // TODO: HALTSUM2, HALTSUM3 - uint32_t expected_haltsum0 = 0; - for (int i = 0; i < riscv_count_harts(target); i +=32){ - expected_haltsum0 |= (1 << (i / 32)); - } - dmi_read(target, &testvar_read, DMI_HALTSUM0); - COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should report summary of 32 halted harts"); - - dmi_write(target, DMI_HALTSUM0, 0xffffffff); - dmi_read(target, &testvar_read, DMI_HALTSUM0); - COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should be R/O"); - - dmi_write(target, DMI_HALTSUM0, 0x0); - dmi_read(target, &testvar_read, DMI_HALTSUM0); - COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should be R/O"); - - for (int i = 0; i < 32/*TODO: riscv_count_harts(target)*/; i +=32){ - //TODO: Set hartsel for i > 32 harts. - dmi_read(target, &testvar_read, DMI_HALTSUM1); - uint32_t haltsum1_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFFU : ((1U << (riscv_count_harts(target) % 32)) - 1); - COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should report summary of 1024 halted harts"); - - // Just have to check this once - if (i == 0) { - dmi_write(target, DMI_HALTSUM1, 0xffffffff); - dmi_read(target, &testvar_read, DMI_HALTSUM1); - COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should be R/O"); - - dmi_write(target, DMI_HALTSUM1, 0x0); - dmi_read(target, &testvar_read, DMI_HALTSUM1); - COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should be R/O"); - } - } - - // TODO: HAWINDOWSEL - - // TODO: HAWINDOW - - // ABSTRACTCS - - uint32_t abstractcs; - dmi_read(target, &abstractcs, DMI_ABSTRACTCS); - - // Check that all reported Data Words are really R/W - for (int invert = 0; invert < 2; invert++) { - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ - testvar = (i + 1) * 0x11111111; - if (invert) {testvar = ~testvar;} - dmi_write(target, DMI_DATA0 + i, testvar); - } - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ - testvar = (i + 1) * 0x11111111; - if (invert) {testvar = ~testvar;} - dmi_read(target, &testvar_read, DMI_DATA0 + i); - COMPLIANCE_TEST(testvar_read == testvar, "All reported DATA words must be R/W"); - } - } - - // Check that all reported ProgBuf words are really R/W - for (int invert = 0; invert < 2; invert++) { - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ - testvar = (i + 1) * 0x11111111; - if (invert) {testvar = ~testvar;} - dmi_write(target, DMI_PROGBUF0 + i, testvar); - } - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ - testvar = (i + 1) * 0x11111111; - if (invert) {testvar = ~testvar;} - dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); - COMPLIANCE_TEST(testvar_read == testvar, "All reported PROGBUF words must be R/W"); - } - } - - // TODO: Cause and clear all error types - - // COMMAND - // TODO: Unclear from the spec whether all these bits need to truly be R/W. - // But at any rate, this is not legal and should cause an error. - dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); - dmi_read(target, &testvar_read, DMI_COMMAND); - COMPLIANCE_TEST(testvar_read == 0xAAAAAAAA, "COMMAND register should be R/W"); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ - "Illegal COMMAND should result in UNSUPPORTED"); - dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); - dmi_write(target, DMI_COMMAND, 0x55555555); - dmi_read(target, &testvar_read, DMI_COMMAND); - COMPLIANCE_TEST(testvar_read == 0x55555555, "COMMAND register should be R/W"); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ - "Illegal COMMAND should result in UNSUPPORTED"); - dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); - - // Basic Abstract Commands - uint32_t command = 0; - uint32_t busy; - command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3:2); - command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1); - for (unsigned int i = 1 ; i < 32 ; i = i << 1) { - command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_ZERO + i); - command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1); - dmi_write(target, DMI_DATA0, i); - if (riscv_xlen(target) > 32) { - dmi_write(target, DMI_DATA0 + 1, i + 1); - } - dmi_write(target, DMI_COMMAND, command); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, "GPR Writes should be supported."); - dmi_write(target, DMI_DATA0, 0xDEADBEEF); - if (riscv_xlen(target) > 32) { - dmi_write(target, DMI_DATA0 + 1, 0xDEADBEEF); - } - command = set_field(command, AC_ACCESS_REGISTER_WRITE, 0); - dmi_write(target, DMI_COMMAND, command); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, "GPR Reads should be supported."); - dmi_read(target, &testvar_read, DMI_DATA0); - COMPLIANCE_TEST(testvar_read == i, "GPR Reads and writes should be supported."); - if (riscv_xlen(target) > 32) { - dmi_read(target, &testvar_read, DMI_DATA0 + 1); - COMPLIANCE_TEST(testvar_read == (i + 1), "GPR Reads and writes should be supported."); - } - } - - // ABSTRACTAUTO - // See which bits are actually writable - dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); - uint32_t abstractauto; - dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); - dmi_write(target, DMI_ABSTRACTAUTO, 0x0); - if (abstractauto > 0) { - testvar = 0; - // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not - // a true compliance requirement. - uint32_t result = riscv_set_register(target, GDB_REGNO_S0, 0); - COMPLIANCE_TEST(result == ERROR_OK, "Need to be able to write S0 to test ABSTRACTAUTO"); - struct riscv_program program; - riscv_program_init(&program, target); - // Also testing that WFI() is a NOP during debug mode. - riscv_program_insert(&program, wfi()); - riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); - riscv_program_ebreak(&program); - dmi_write(target, DMI_ABSTRACTAUTO, 0x0); - riscv_program_exec(&program, target); - testvar ++; - dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); - dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); - uint32_t autoexec_data = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECDATA); - uint32_t autoexec_progbuf = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF); - for (unsigned int i = 0; i < 12; i ++){ - dmi_read(target, &testvar_read, DMI_DATA0 + i); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - if (autoexec_data & (1 << i)) { - COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT), "AUTOEXEC may be writable up to DATACOUNT bits."); - testvar ++; - } - } - for (unsigned int i = 0; i < 16; i ++){ - dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - if (autoexec_progbuf & (1 << i)) { - COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE), "AUTOEXEC may be writable up to PROGBUFSIZE bits."); - testvar ++; - } - } - - dmi_write(target, DMI_ABSTRACTAUTO, 0); - riscv_get_register(target, &value, GDB_REGNO_S0); - - COMPLIANCE_TEST(testvar == value, \ - "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); - } - - // Single-Step each hart. - for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ - riscv_set_current_hartid(target, hartsel); - riscv013_on_step(target); - riscv013_step_current_hart(target); - COMPLIANCE_TEST(riscv_halt_reason(target, hartsel) == RISCV_HALT_SINGLESTEP, "Single Step should result in SINGLESTEP"); - } - - // Core Register Tests - uint64_t bogus_dpc = 0xdeadbeef; - for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel ++){ - riscv_set_current_hartid(target, hartsel); - - // DCSR Tests - riscv_set_register(target, GDB_REGNO_DCSR, 0x0); - riscv_get_register(target, &value, GDB_REGNO_DCSR); - COMPLIANCE_TEST(value != 0, "Not all bits in DCSR are writable by Debugger"); - riscv_set_register(target, GDB_REGNO_DCSR, 0xFFFFFFFF); - riscv_get_register(target, &value, GDB_REGNO_DCSR); - COMPLIANCE_TEST(value != 0, "At least some bits in DCSR must be 1"); - - // DPC. Note that DPC is sign-extended. - riscv_reg_t dpcmask = 0xFFFFFFFCUL; - riscv_reg_t dpc; - - if (riscv_xlen(target) > 32) { - dpcmask |= (0xFFFFFFFFULL << 32); - } - if (riscv_supports_extension(target, riscv_current_hartid(target), 'C')){ - dpcmask |= 0x2; - } - - riscv_set_register(target, GDB_REGNO_DPC, dpcmask); - riscv_get_register(target, &dpc, GDB_REGNO_DPC); - COMPLIANCE_TEST(dpcmask == dpc, "DPC must be sign-extended to XLEN and writable to all-1s (except the least significant bits)"); - riscv_set_register(target, GDB_REGNO_DPC, 0); - riscv_get_register(target, &dpc, GDB_REGNO_DPC); - COMPLIANCE_TEST(dpc == 0, "DPC must be writable to 0."); - if (hartsel == 0) {bogus_dpc = dpc;} // For a later test step - } - - //NDMRESET - // NDMRESET - // Asserting non-debug module reset should not reset Debug Module state. - // But it should reset Hart State, e.g. DPC should get a different value. - // Also make sure that DCSR reports cause of 'HALT' even though previously we single-stepped. - - // Write some registers. They should not be impacted by ndmreset. - dmi_write(target, DMI_COMMAND, 0xFFFFFFFF); - - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ - testvar = (i + 1) * 0x11111111; - dmi_write(target, DMI_PROGBUF0 + i, testvar); - } - - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ - testvar = (i + 1) * 0x11111111; - dmi_write(target, DMI_DATA0 + i, testvar); - } - - dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); - dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); - - // Pulse reset. - - target->reset_halt = true; - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - riscv_set_current_hartid(target, 0); - assert_reset(target); - deassert_reset(target); - - // Verify that most stuff is not affected by ndmreset. - dmi_read(target, &testvar_read, DMI_COMMAND); - COMPLIANCE_TEST(testvar_read == 0xFFFFFFFF, "NDMRESET should not affect DMI_COMMAND"); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, "NDMRESET should not affect DMI_ABSTRACTCS"); - dmi_read(target, &testvar_read, DMI_ABSTRACTAUTO); - COMPLIANCE_TEST(testvar_read == abstractauto, "NDMRESET should not affect DMI_ABSTRACTAUTO"); - - // Clean up to avoid future test failures - dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); - dmi_write(target, DMI_ABSTRACTAUTO, 0); - - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ - testvar = (i + 1) * 0x11111111; - dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); - COMPLIANCE_TEST(testvar_read == testvar, "PROGBUF words must not be affected by NDMRESET"); - } - - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ - testvar = (i + 1) * 0x11111111; - dmi_read(target, &testvar_read, DMI_DATA0 + i); - COMPLIANCE_TEST(testvar_read == testvar, "DATA words must not be affected by NDMRESET"); - } - - // verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be, - // just verify that at least it's not the bogus value anymore. - COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)"); - riscv_get_register(target, &value, GDB_REGNO_DPC); - COMPLIANCE_TEST(bogus_dpc != value, "NDMRESET should move DPC to reset value."); - - COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, "After NDMRESET halt, DCSR should report cause of halt"); - - // DMACTIVE -- deasserting DMACTIVE should reset all the above values. - - // Toggle dmactive - dmi_write(target, DMI_DMCONTROL, 0); - dmi_write(target, DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE); - dmi_read(target, &testvar_read, DMI_COMMAND); - COMPLIANCE_TEST(testvar_read == 0, "DMI_COMMAND should reset to 0"); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, "ABSTRACTCS.cmderr should reset to 0"); - dmi_read(target, &testvar_read, DMI_ABSTRACTAUTO); - COMPLIANCE_TEST(testvar_read == 0, "ABSTRACTAUTO should reset to 0"); - - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i ++){ - testvar = (i + 1) * 0x11111111; - dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); - COMPLIANCE_TEST(testvar_read == 0, "PROGBUF words should reset to 0"); - } - - for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i ++){ - testvar = (i + 1) * 0x11111111; - dmi_read(target, &testvar_read, DMI_DATA0 + i); - COMPLIANCE_TEST(testvar_read == 0, "DATA words should reset to 0"); - } - - //TODO: - // DCSR.cause priorities - // DCSR.stoptime/stopcycle - // DCSR.stepie - // DCSR.ebreak - // DCSR.prv - - /* Halt every hart for any follow-up tests*/ - riscv_halt_all_harts(target); - - LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); - - if (total_tests == passed_tests) { - return ERROR_OK; - } else { - return ERROR_FAIL; - } +#define COMPLIANCE_TEST(b, message) \ +{ \ + int pass = 0; \ + if (b) { \ + pass = 1; \ + passed_tests++; \ + } \ + LOG_INFO("%s test %d (%s)\n", (pass) ? "PASSED" : "FAILED", total_tests, message); \ + assert(pass); \ + total_tests++; \ +} + +int riscv013_test_compliance(struct target *target) +{ + LOG_INFO("Testing Compliance against RISC-V Debug Spec v0.13"); + + if (!riscv_rtos_enabled(target)) { + LOG_ERROR("Please run with -rtos riscv to run compliance test."); + return ERROR_FAIL; + } + + int total_tests = 0; + int passed_tests = 0; + + uint32_t dmcontrol_orig; + dmi_read(target, &dmcontrol_orig, DMI_DMCONTROL); + uint32_t dmcontrol; + uint32_t testvar; + uint32_t testvar_read; + riscv_reg_t value; + + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), RISCV_MAX_HARTS-1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == (RISCV_MAX_HARTS-1), + "DMCONTROL.hartsel should hold all the harts allowed by HARTSELLEN."); + + dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), 0); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == 0, "DMCONTROL.hartsel should hold Hart ID 0"); + + /* hartreset */ + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + testvar = get_field(dmcontrol, DMI_DMCONTROL_HARTRESET); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HARTRESET)) == 0), + "DMCONTROL.hartreset can be 0 or RW."); + + /* hasel */ + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + testvar = get_field(dmcontrol, DMI_DMCONTROL_HASEL); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HASEL)) == 0), + "DMCONTROL.hasel can be 0 or RW."); + /* TODO: test that hamask registers exist if hasel does. */ + + /* haltreq */ + riscv_halt_all_harts(target); + /* Writing haltreq should not cause any problems for a halted hart, but we + should be able to read and write it. */ + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + dmcontrol |= DMI_DMCONTROL_HALTREQ; + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + COMPLIANCE_TEST(dmcontrol & DMI_DMCONTROL_HALTREQ, "DMCONTROL.haltreq should be R/W"); + uint32_t dmstatus, dmstatus_read; + do { + dmi_read(target, &dmstatus, DMI_DMSTATUS); + } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); + + dmi_write(target, DMI_DMSTATUS, 0xffffffff); + dmi_read(target, &dmstatus_read, DMI_DMSTATUS); + COMPLIANCE_TEST(dmstatus_read == dmstatus, "DMSTATUS is R/O"); + + /* resumereq. This will resume the hart but this test is destructive anyway. */ + dmcontrol &= ~DMI_DMCONTROL_HALTREQ; + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 1); + dmi_write(target, DMI_DMCONTROL, dmcontrol); + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ) == 1, + "DMCONTROL.resumereq should be R/W"); + + do { + dmi_read(target, &dmstatus, DMI_DMSTATUS); + } while (get_field(dmstatus, DMI_DMSTATUS_ALLRESUMEACK) == 0); + + /* Halt the hart again because the target isn't aware that we resumed it. */ + dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 0); + dmcontrol |= DMI_DMCONTROL_HALTREQ; + dmi_write(target, DMI_DMCONTROL, dmcontrol); + do { + dmi_read(target, &dmstatus, DMI_DMSTATUS); + } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); + dmcontrol &= ~DMI_DMCONTROL_HALTREQ; + dmi_write(target, DMI_DMCONTROL, dmcontrol); + /* Not clear that this read is required according to the spec. */ + dmi_read(target, &dmstatus, DMI_DMSTATUS); + + /* HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. */ + for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++) { + riscv_set_current_hartid(target, hartsel); + + uint32_t hartinfo, hartinfo_read; + dmi_read(target, &hartinfo, DMI_HARTINFO); + dmi_write(target, DMI_HARTINFO, ~hartinfo); + dmi_read(target, &hartinfo_read, DMI_HARTINFO); + COMPLIANCE_TEST((hartinfo_read == hartinfo), "DMHARTINFO should be Read-Only."); + + uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); + for (unsigned int d = 0; d < nscratch; d++) { + /* TODO: DSCRATCH CSRs should be 64-bit on 64-bit systems. */ + riscv_reg_t testval; + for (testval = 0x0011223300112233; + testval != 0xDEAD; + testval = testval == 0x0011223300112233 ? ~testval : 0xDEAD) { + COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, testval) == ERROR_OK, + "Need to be able to write S0 in order to test DSCRATCH."); + struct riscv_program program32; + riscv_program_init(&program32, target); + riscv_program_csrw(&program32, GDB_REGNO_S0, GDB_REGNO_DSCRATCH + d); + riscv_program_csrr(&program32, GDB_REGNO_S1, GDB_REGNO_DSCRATCH + d); + riscv_program_fence(&program32); + riscv_program_ebreak(&program32); + COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, + "Accessing DSCRATCH with program buffer should succeed."); + COMPLIANCE_TEST(register_read_direct(target, &value, GDB_REGNO_S1) == ERROR_OK, + "Need to be able to read S1 in order to test DSCRATCH."); + if (riscv_xlen(target) > 32) + COMPLIANCE_TEST(value == testval, + "All DSCRATCH registers in HARTINFO must be R/W."); + else + COMPLIANCE_TEST(value == (testval & 0xFFFFFFFF), + "All DSCRATCH registers in HARTINFO must be R/W."); + } + } + /* TODO: dataaccess */ + if (get_field(hartinfo, DMI_HARTINFO_DATAACCESS)) { + /* TODO: Shadowed in memory map. */ + /* TODO: datasize */ + /* TODO: dataaddr */ + } else { + /* TODO: Shadowed in CSRs. */ + /* TODO: datasize */ + /* TODO: dataaddr */ + } + + } + + /* HALTSUM -- TODO: More than 32 harts */ + /* TODO: HALTSUM2, HALTSUM3 */ + uint32_t expected_haltsum0 = 0; + for (int i = 0; i < riscv_count_harts(target); i += 32) + expected_haltsum0 |= (1 << (i / 32)); + + dmi_read(target, &testvar_read, DMI_HALTSUM0); + COMPLIANCE_TEST(testvar_read == expected_haltsum0, + "HALTSUM0 should report summary of 32 halted harts"); + + dmi_write(target, DMI_HALTSUM0, 0xffffffff); + dmi_read(target, &testvar_read, DMI_HALTSUM0); + COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should be R/O"); + + dmi_write(target, DMI_HALTSUM0, 0x0); + dmi_read(target, &testvar_read, DMI_HALTSUM0); + COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should be R/O"); + + for (int i = 0; i < 32/*TODO: riscv_count_harts(target)*/; i += 32) { + /* TODO: Set hartsel for i > 32 harts. */ + dmi_read(target, &testvar_read, DMI_HALTSUM1); + uint32_t haltsum1_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? + 0xFFFFFFFFU : + ((1U << (riscv_count_harts(target) % 32)) - 1); + COMPLIANCE_TEST(testvar_read == haltsum1_expected, + "HALTSUM1 should report summary of 1024 halted harts"); + + /* Just have to check this once */ + if (i == 0) { + dmi_write(target, DMI_HALTSUM1, 0xffffffff); + dmi_read(target, &testvar_read, DMI_HALTSUM1); + COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should be R/O"); + + dmi_write(target, DMI_HALTSUM1, 0x0); + dmi_read(target, &testvar_read, DMI_HALTSUM1); + COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should be R/O"); + } + } + + /* TODO: HAWINDOWSEL */ + + /* TODO: HAWINDOW */ + + /* ABSTRACTCS */ + + uint32_t abstractcs; + dmi_read(target, &abstractcs, DMI_ABSTRACTCS); + + /* Check that all reported Data Words are really R/W */ + for (int invert = 0; invert < 2; invert++) { + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i++) { + testvar = (i + 1) * 0x11111111; + if (invert) + testvar = ~testvar; + dmi_write(target, DMI_DATA0 + i, testvar); + } + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i++) { + testvar = (i + 1) * 0x11111111; + if (invert) + testvar = ~testvar; + dmi_read(target, &testvar_read, DMI_DATA0 + i); + COMPLIANCE_TEST(testvar_read == testvar, "All reported DATA words must be R/W"); + } + } + + /*Check that all reported ProgBuf words are really R/W */ + for (int invert = 0; invert < 2; invert++) { + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i++) { + testvar = (i + 1) * 0x11111111; + if (invert) + testvar = ~testvar; + dmi_write(target, DMI_PROGBUF0 + i, testvar); + } + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i++) { + testvar = (i + 1) * 0x11111111; + if (invert) + testvar = ~testvar; + dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); + COMPLIANCE_TEST(testvar_read == testvar, "All reported PROGBUF words must be R/W"); + } + } + + /* TODO: Cause and clear all error types */ + + /* COMMAND + TODO: Unclear from the spec whether all these bits need to truly be R/W. + But at any rate, this is not legal and should cause an error. */ + dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); + dmi_read(target, &testvar_read, DMI_COMMAND); + COMPLIANCE_TEST(testvar_read == 0xAAAAAAAA, "COMMAND register should be R/W"); + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ + "Illegal COMMAND should result in UNSUPPORTED"); + dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + dmi_write(target, DMI_COMMAND, 0x55555555); + dmi_read(target, &testvar_read, DMI_COMMAND); + COMPLIANCE_TEST(testvar_read == 0x55555555, "COMMAND register should be R/W"); + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ + "Illegal COMMAND should result in UNSUPPORTED"); + dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + + /* Basic Abstract Commands */ + uint32_t command = 0; + uint32_t busy; + command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3 : 2); + command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1); + for (unsigned int i = 1; i < 32; i = i << 1) { + command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_ZERO + i); + command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1); + dmi_write(target, DMI_DATA0, i); + if (riscv_xlen(target) > 32) + dmi_write(target, DMI_DATA0 + 1, i + 1); + dmi_write(target, DMI_COMMAND, command); + do { + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); + } while (busy); + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, + "GPR Writes should be supported."); + dmi_write(target, DMI_DATA0, 0xDEADBEEF); + if (riscv_xlen(target) > 32) + dmi_write(target, DMI_DATA0 + 1, 0xDEADBEEF); + command = set_field(command, AC_ACCESS_REGISTER_WRITE, 0); + dmi_write(target, DMI_COMMAND, command); + do { + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); + } while (busy); + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, + "GPR Reads should be supported."); + dmi_read(target, &testvar_read, DMI_DATA0); + COMPLIANCE_TEST(testvar_read == i, "GPR Reads and writes should be supported."); + if (riscv_xlen(target) > 32) { + dmi_read(target, &testvar_read, DMI_DATA0 + 1); + COMPLIANCE_TEST(testvar_read == (i + 1), + "GPR Reads and writes should be supported."); + } + } + + /* ABSTRACTAUTO + See which bits are actually writable */ + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + uint32_t abstractauto; + dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); + dmi_write(target, DMI_ABSTRACTAUTO, 0x0); + if (abstractauto > 0) { + testvar = 0; + /* TODO: This mechanism only works when you have a reasonable sized progbuf, which is not + a true compliance requirement. */ + uint32_t result = riscv_set_register(target, GDB_REGNO_S0, 0); + COMPLIANCE_TEST(result == ERROR_OK, "Need to be able to write S0 to test ABSTRACTAUTO"); + struct riscv_program program; + riscv_program_init(&program, target); + /* Also testing that WFI() is a NOP during debug mode. */ + riscv_program_insert(&program, wfi()); + riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); + riscv_program_ebreak(&program); + dmi_write(target, DMI_ABSTRACTAUTO, 0x0); + riscv_program_exec(&program, target); + testvar++; + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); + uint32_t autoexec_data = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECDATA); + uint32_t autoexec_progbuf = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF); + for (unsigned int i = 0; i < 12; i++) { + dmi_read(target, &testvar_read, DMI_DATA0 + i); + do { + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); + } while (busy); + if (autoexec_data & (1 << i)) { + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT), + "AUTOEXEC may be writable up to DATACOUNT bits."); + testvar++; + } + } + for (unsigned int i = 0; i < 16; i++) { + dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); + do { + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); + } while (busy); + if (autoexec_progbuf & (1 << i)) { + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE), + "AUTOEXEC may be writable up to PROGBUFSIZE bits."); + testvar++; + } + } + + dmi_write(target, DMI_ABSTRACTAUTO, 0); + riscv_get_register(target, &value, GDB_REGNO_S0); + + COMPLIANCE_TEST(testvar == value, \ + "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); + } + + /* Single-Step each hart. */ + for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++) { + riscv_set_current_hartid(target, hartsel); + riscv013_on_step(target); + riscv013_step_current_hart(target); + COMPLIANCE_TEST(riscv_halt_reason(target, hartsel) == RISCV_HALT_SINGLESTEP, + "Single Step should result in SINGLESTEP"); + } + + /* Core Register Tests */ + uint64_t bogus_dpc = 0xdeadbeef; + for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++) { + riscv_set_current_hartid(target, hartsel); + + /* DCSR Tests */ + riscv_set_register(target, GDB_REGNO_DCSR, 0x0); + riscv_get_register(target, &value, GDB_REGNO_DCSR); + COMPLIANCE_TEST(value != 0, "Not all bits in DCSR are writable by Debugger"); + riscv_set_register(target, GDB_REGNO_DCSR, 0xFFFFFFFF); + riscv_get_register(target, &value, GDB_REGNO_DCSR); + COMPLIANCE_TEST(value != 0, "At least some bits in DCSR must be 1"); + + /* DPC. Note that DPC is sign-extended. */ + riscv_reg_t dpcmask = 0xFFFFFFFCUL; + riscv_reg_t dpc; + + if (riscv_xlen(target) > 32) + dpcmask |= (0xFFFFFFFFULL << 32); + + if (riscv_supports_extension(target, riscv_current_hartid(target), 'C')) + dpcmask |= 0x2; + + riscv_set_register(target, GDB_REGNO_DPC, dpcmask); + riscv_get_register(target, &dpc, GDB_REGNO_DPC); + COMPLIANCE_TEST(dpcmask == dpc, + "DPC must be sign-extended to XLEN and writable to all-1s (except the least significant bits)"); + riscv_set_register(target, GDB_REGNO_DPC, 0); + riscv_get_register(target, &dpc, GDB_REGNO_DPC); + COMPLIANCE_TEST(dpc == 0, "DPC must be writable to 0."); + if (hartsel == 0) + bogus_dpc = dpc; /* For a later test step */ + } + + /* NDMRESET + Asserting non-debug module reset should not reset Debug Module state. + But it should reset Hart State, e.g. DPC should get a different value. + Also make sure that DCSR reports cause of 'HALT' even though previously we single-stepped. + */ + + /* Write some registers. They should not be impacted by ndmreset. */ + dmi_write(target, DMI_COMMAND, 0xFFFFFFFF); + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i++) { + testvar = (i + 1) * 0x11111111; + dmi_write(target, DMI_PROGBUF0 + i, testvar); + } + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i++) { + testvar = (i + 1) * 0x11111111; + dmi_write(target, DMI_DATA0 + i, testvar); + } + + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); + + /* Pulse reset. */ + + target->reset_halt = true; + dmi_read(target, &dmcontrol, DMI_DMCONTROL); + riscv_set_current_hartid(target, 0); + assert_reset(target); + deassert_reset(target); + + /* Verify that most stuff is not affected by ndmreset. */ + dmi_read(target, &testvar_read, DMI_COMMAND); + COMPLIANCE_TEST(testvar_read == 0xFFFFFFFF, "NDMRESET should not affect DMI_COMMAND"); + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, + "NDMRESET should not affect DMI_ABSTRACTCS"); + dmi_read(target, &testvar_read, DMI_ABSTRACTAUTO); + COMPLIANCE_TEST(testvar_read == abstractauto, "NDMRESET should not affect DMI_ABSTRACTAUTO"); + + /* Clean up to avoid future test failures */ + dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); + dmi_write(target, DMI_ABSTRACTAUTO, 0); + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i++) { + testvar = (i + 1) * 0x11111111; + dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); + COMPLIANCE_TEST(testvar_read == testvar, "PROGBUF words must not be affected by NDMRESET"); + } + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i++) { + testvar = (i + 1) * 0x11111111; + dmi_read(target, &testvar_read, DMI_DATA0 + i); + COMPLIANCE_TEST(testvar_read == testvar, "DATA words must not be affected by NDMRESET"); + } + + /* Verify that DPC *is* affected by ndmreset. Since we don't know what it *should* be, + just verify that at least it's not the bogus value anymore. */ + + COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)"); + riscv_get_register(target, &value, GDB_REGNO_DPC); + COMPLIANCE_TEST(bogus_dpc != value, "NDMRESET should move DPC to reset value."); + + COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, + "After NDMRESET halt, DCSR should report cause of halt"); + + /* DMACTIVE -- deasserting DMACTIVE should reset all the above values. */ + + /* Toggle dmactive */ + dmi_write(target, DMI_DMCONTROL, 0); + dmi_write(target, DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE); + dmi_read(target, &testvar_read, DMI_COMMAND); + COMPLIANCE_TEST(testvar_read == 0, "DMI_COMMAND should reset to 0"); + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, "ABSTRACTCS.cmderr should reset to 0"); + dmi_read(target, &testvar_read, DMI_ABSTRACTAUTO); + COMPLIANCE_TEST(testvar_read == 0, "ABSTRACTAUTO should reset to 0"); + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i++) { + testvar = (i + 1) * 0x11111111; + dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); + COMPLIANCE_TEST(testvar_read == 0, "PROGBUF words should reset to 0"); + } + + for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT); i++) { + testvar = (i + 1) * 0x11111111; + dmi_read(target, &testvar_read, DMI_DATA0 + i); + COMPLIANCE_TEST(testvar_read == 0, "DATA words should reset to 0"); + } + + /* + * TODO: + * DCSR.cause priorities + * DCSR.stoptime/stopcycle + * DCSR.stepie + * DCSR.ebreak + * DCSR.prv + */ + + /* Halt every hart for any follow-up tests*/ + riscv_halt_all_harts(target); + + LOG_INFO("PASSED %d of %d TESTS\n", passed_tests, total_tests); + + if (total_tests == passed_tests) + return ERROR_OK; + else + return ERROR_FAIL; } From 4c6c4cb0782f93115acd40826bc061fc6b4ea93b Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 07:53:34 -0700 Subject: [PATCH 33/53] riscv: Add a TODO note we need to handle hartselhi --- src/target/riscv/riscv-013.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 8199750d7..e349a4317 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -278,8 +278,9 @@ static void decode_dmi(char *text, unsigned address, unsigned data) { DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" }, { DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" }, - { DMI_DMCONTROL, ((1L<<10)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET, "hartsel" }, - { DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" }, + { DMI_DMCONTROL, ((1L<<10)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET, "hartsello" }, + /* TODO: hartsellhi */ + { DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" }, { DMI_DMSTATUS, DMI_DMSTATUS_IMPEBREAK, "impebreak" }, From 716c12bcaf96a44d952e35b4e8658e80179e2996 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 07:57:32 -0700 Subject: [PATCH 34/53] riscv: don't supporess errors --- src/target/riscv/riscv-013.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index e349a4317..7f4c7e916 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -466,11 +466,7 @@ static dmi_status_t dmi_scan(struct target *target, uint32_t *address_in, int retval = jtag_execute_queue(); if (retval != ERROR_OK) { - static int once = 1; - if (once) { - LOG_ERROR("dmi_scan failed jtag scan"); - once = 0; - } + LOG_ERROR("dmi_scan failed jtag scan"); return DMI_STATUS_FAILED; } From ef684c2e68e646ba05da2c34130b2e1dd67fa02b Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 10:28:13 -0700 Subject: [PATCH 35/53] riscv-compliance: Incorporate feedback to make tests make fewer assumptions about hte implementation and properly use OpenOCD functions --- src/target/riscv/riscv-013.c | 289 ++++++++++++++++------------------- 1 file changed, 128 insertions(+), 161 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 7f4c7e916..c250c7e7b 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -264,6 +264,7 @@ static dm013_info_t *get_dm(struct target *target) static uint32_t hartsel_mask(const struct target *target) { RISCV013_INFO(info); + /* TODO: Properly handle hartselhi as well*/ return ((1L<hartsellen)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET; } @@ -2955,30 +2956,34 @@ int riscv013_test_compliance(struct target *target) int total_tests = 0; int passed_tests = 0; - uint32_t dmcontrol_orig; - dmi_read(target, &dmcontrol_orig, DMI_DMCONTROL); + uint32_t dmcontrol_orig = 0; uint32_t dmcontrol; uint32_t testvar; uint32_t testvar_read; riscv_reg_t value; + RISCV013_INFO(info); - dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), RISCV_MAX_HARTS-1); + /* TODO: Support HARTSELLHI as well */ + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSELLO, RISCV_MAX_HARTS-1); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == (RISCV_MAX_HARTS-1), - "DMCONTROL.hartsel should hold all the harts allowed by HARTSELLEN."); + COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSELLO) == (uint32_t) ((1 << info->hartsellen) - 1), + "DMCONTROL.hartsello should hold all the harts allowed by its hartsellen."); - dmcontrol = set_field(dmcontrol_orig, hartsel_mask(target), 0); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSELLO, 0); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, hartsel_mask(target)) == 0, "DMCONTROL.hartsel should hold Hart ID 0"); + COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSELLO) == 0, + "DMCONTROL.hartsello should hold Hart ID 0"); /* hartreset */ + /* This field is optional. Either we can read and write it to 1/0, + or it is tied to 0. */ dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); testvar = get_field(dmcontrol, DMI_DMCONTROL_HARTRESET); - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 0); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HARTRESET)) == 0), @@ -2989,7 +2994,7 @@ int riscv013_test_compliance(struct target *target) dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); testvar = get_field(dmcontrol, DMI_DMCONTROL_HASEL); - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 1); + dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HASEL, 0); dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); COMPLIANCE_TEST(((testvar == 0) || (get_field(dmcontrol, DMI_DMCONTROL_HASEL)) == 0), @@ -2998,45 +3003,21 @@ int riscv013_test_compliance(struct target *target) /* haltreq */ riscv_halt_all_harts(target); - /* Writing haltreq should not cause any problems for a halted hart, but we - should be able to read and write it. */ - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - dmcontrol |= DMI_DMCONTROL_HALTREQ; - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(dmcontrol & DMI_DMCONTROL_HALTREQ, "DMCONTROL.haltreq should be R/W"); - uint32_t dmstatus, dmstatus_read; - do { - dmi_read(target, &dmstatus, DMI_DMSTATUS); - } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); + /* This bit is not actually readable according to the spec, so nothing to check.*/ - dmi_write(target, DMI_DMSTATUS, 0xffffffff); + /* DMSTATUS */ + uint32_t dmstatus, dmstatus_read; + dmi_read(target, &dmstatus, DMI_DMSTATUS); + dmi_write(target, DMI_DMSTATUS, ~dmstatus); dmi_read(target, &dmstatus_read, DMI_DMSTATUS); COMPLIANCE_TEST(dmstatus_read == dmstatus, "DMSTATUS is R/O"); - /* resumereq. This will resume the hart but this test is destructive anyway. */ - dmcontrol &= ~DMI_DMCONTROL_HALTREQ; - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 1); - dmi_write(target, DMI_DMCONTROL, dmcontrol); - dmi_read(target, &dmcontrol, DMI_DMCONTROL); - COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ) == 1, - "DMCONTROL.resumereq should be R/W"); + /* resumereq */ + /* This bit is not actually readable according to the spec, so nothing to check.*/ + riscv_resume_all_harts(target); - do { - dmi_read(target, &dmstatus, DMI_DMSTATUS); - } while (get_field(dmstatus, DMI_DMSTATUS_ALLRESUMEACK) == 0); - - /* Halt the hart again because the target isn't aware that we resumed it. */ - dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 0); - dmcontrol |= DMI_DMCONTROL_HALTREQ; - dmi_write(target, DMI_DMCONTROL, dmcontrol); - do { - dmi_read(target, &dmstatus, DMI_DMSTATUS); - } while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0); - dmcontrol &= ~DMI_DMCONTROL_HALTREQ; - dmi_write(target, DMI_DMCONTROL, dmcontrol); - /* Not clear that this read is required according to the spec. */ - dmi_read(target, &dmstatus, DMI_DMSTATUS); + /* Halt all harts again so the test can continue.*/ + riscv_halt_all_harts(target); /* HARTINFO: Read-Only. This is per-hart, so need to adjust hartsel. */ for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++) { @@ -3048,32 +3029,37 @@ int riscv013_test_compliance(struct target *target) dmi_read(target, &hartinfo_read, DMI_HARTINFO); COMPLIANCE_TEST((hartinfo_read == hartinfo), "DMHARTINFO should be Read-Only."); + /* $dscratch CSRs */ uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); for (unsigned int d = 0; d < nscratch; d++) { - /* TODO: DSCRATCH CSRs should be 64-bit on 64-bit systems. */ - riscv_reg_t testval; - for (testval = 0x0011223300112233; - testval != 0xDEAD; - testval = testval == 0x0011223300112233 ? ~testval : 0xDEAD) { - COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, testval) == ERROR_OK, - "Need to be able to write S0 in order to test DSCRATCH."); - struct riscv_program program32; - riscv_program_init(&program32, target); - riscv_program_csrw(&program32, GDB_REGNO_S0, GDB_REGNO_DSCRATCH + d); - riscv_program_csrr(&program32, GDB_REGNO_S1, GDB_REGNO_DSCRATCH + d); - riscv_program_fence(&program32); - riscv_program_ebreak(&program32); - COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, - "Accessing DSCRATCH with program buffer should succeed."); - COMPLIANCE_TEST(register_read_direct(target, &value, GDB_REGNO_S1) == ERROR_OK, - "Need to be able to read S1 in order to test DSCRATCH."); - if (riscv_xlen(target) > 32) - COMPLIANCE_TEST(value == testval, - "All DSCRATCH registers in HARTINFO must be R/W."); - else - COMPLIANCE_TEST(value == (testval & 0xFFFFFFFF), - "All DSCRATCH registers in HARTINFO must be R/W."); - } + riscv_reg_t testval, testval_read; + /* Because DSCRATCH is not guaranteed to last across PB executions, need to put + this all into one PB execution. Which may not be possible on all implementations.*/ + if (info->progbufsize >= 5) { + for (testval = 0x0011223300112233; + testval != 0xDEAD; + testval = testval == 0x0011223300112233 ? ~testval : 0xDEAD) { + COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, testval) == ERROR_OK, + "Need to be able to write S0 in order to test DSCRATCH."); + struct riscv_program program32; + riscv_program_init(&program32, target); + riscv_program_csrw(&program32, GDB_REGNO_S0, GDB_REGNO_DSCRATCH + d); + riscv_program_csrr(&program32, GDB_REGNO_S1, GDB_REGNO_DSCRATCH + d); + riscv_program_fence(&program32); + riscv_program_ebreak(&program32); + COMPLIANCE_TEST(riscv_program_exec(&program32, target) == ERROR_OK, + "Accessing DSCRATCH with program buffer should succeed."); + COMPLIANCE_TEST(register_read_direct(target, &testval_read, GDB_REGNO_S1) == ERROR_OK, + "Need to be able to read S1 in order to test DSCRATCH."); + if (riscv_xlen(target) > 32) { + COMPLIANCE_TEST(testval == testval_read, + "All DSCRATCH registers in HARTINFO must be R/W."); + } else { + COMPLIANCE_TEST(testval_read == (testval & 0xFFFFFFFF), + "All DSCRATCH registers in HARTINFO must be R/W."); + } + } + } } /* TODO: dataaccess */ if (get_field(hartinfo, DMI_HARTINFO_DATAACCESS)) { @@ -3153,7 +3139,7 @@ int riscv013_test_compliance(struct target *target) } } - /*Check that all reported ProgBuf words are really R/W */ + /* Check that all reported ProgBuf words are really R/W */ for (int invert = 0; invert < 2; invert++) { for (unsigned int i = 0; i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE); i++) { testvar = (i + 1) * 0x11111111; @@ -3173,60 +3159,35 @@ int riscv013_test_compliance(struct target *target) /* TODO: Cause and clear all error types */ /* COMMAND - TODO: Unclear from the spec whether all these bits need to truly be R/W. + According to the spec, this register is only W, so can't really check the read result. But at any rate, this is not legal and should cause an error. */ dmi_write(target, DMI_COMMAND, 0xAAAAAAAA); dmi_read(target, &testvar_read, DMI_COMMAND); - COMPLIANCE_TEST(testvar_read == 0xAAAAAAAA, "COMMAND register should be R/W"); dmi_read(target, &testvar_read, DMI_ABSTRACTCS); COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ "Illegal COMMAND should result in UNSUPPORTED"); dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); dmi_write(target, DMI_COMMAND, 0x55555555); dmi_read(target, &testvar_read, DMI_COMMAND); - COMPLIANCE_TEST(testvar_read == 0x55555555, "COMMAND register should be R/W"); dmi_read(target, &testvar_read, DMI_ABSTRACTCS); COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \ "Illegal COMMAND should result in UNSUPPORTED"); dmi_write(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR); /* Basic Abstract Commands */ - uint32_t command = 0; - uint32_t busy; - command = set_field(command, AC_ACCESS_REGISTER_SIZE, riscv_xlen(target) > 32 ? 3 : 2); - command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1); for (unsigned int i = 1; i < 32; i = i << 1) { - command = set_field(command, AC_ACCESS_REGISTER_REGNO, 0x1000 + GDB_REGNO_ZERO + i); - command = set_field(command, AC_ACCESS_REGISTER_WRITE, 1); - dmi_write(target, DMI_DATA0, i); - if (riscv_xlen(target) > 32) - dmi_write(target, DMI_DATA0 + 1, i + 1); - dmi_write(target, DMI_COMMAND, command); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, + riscv_reg_t testval = i | ((i + 1ULL) << 32); + riscv_reg_t testval_read; + COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_ZERO + i, testval), "GPR Writes should be supported."); - dmi_write(target, DMI_DATA0, 0xDEADBEEF); - if (riscv_xlen(target) > 32) - dmi_write(target, DMI_DATA0 + 1, 0xDEADBEEF); - command = set_field(command, AC_ACCESS_REGISTER_WRITE, 0); - dmi_write(target, DMI_COMMAND, command); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == 0, + write_abstract_arg(target, 0, 0xDEADBEEFDEADBEEF, 64); + COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i), "GPR Reads should be supported."); - dmi_read(target, &testvar_read, DMI_DATA0); - COMPLIANCE_TEST(testvar_read == i, "GPR Reads and writes should be supported."); if (riscv_xlen(target) > 32) { - dmi_read(target, &testvar_read, DMI_DATA0 + 1); - COMPLIANCE_TEST(testvar_read == (i + 1), - "GPR Reads and writes should be supported."); + COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); + } else { + COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); + } } @@ -3234,58 +3195,64 @@ int riscv013_test_compliance(struct target *target) See which bits are actually writable */ dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); uint32_t abstractauto; + uint32_t busy; dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); dmi_write(target, DMI_ABSTRACTAUTO, 0x0); if (abstractauto > 0) { - testvar = 0; - /* TODO: This mechanism only works when you have a reasonable sized progbuf, which is not + /* This mechanism only works when you have a reasonable sized progbuf, which is not a true compliance requirement. */ - uint32_t result = riscv_set_register(target, GDB_REGNO_S0, 0); - COMPLIANCE_TEST(result == ERROR_OK, "Need to be able to write S0 to test ABSTRACTAUTO"); - struct riscv_program program; - riscv_program_init(&program, target); - /* Also testing that WFI() is a NOP during debug mode. */ - riscv_program_insert(&program, wfi()); - riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); - riscv_program_ebreak(&program); - dmi_write(target, DMI_ABSTRACTAUTO, 0x0); - riscv_program_exec(&program, target); - testvar++; - dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); - dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); - uint32_t autoexec_data = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECDATA); - uint32_t autoexec_progbuf = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF); - for (unsigned int i = 0; i < 12; i++) { - dmi_read(target, &testvar_read, DMI_DATA0 + i); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - if (autoexec_data & (1 << i)) { - COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT), - "AUTOEXEC may be writable up to DATACOUNT bits."); - testvar++; - } - } - for (unsigned int i = 0; i < 16; i++) { - dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); - do { - dmi_read(target, &testvar_read, DMI_ABSTRACTCS); - busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); - } while (busy); - if (autoexec_progbuf & (1 << i)) { - COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE), - "AUTOEXEC may be writable up to PROGBUFSIZE bits."); - testvar++; - } - } + if (info->progbufsize >= 3) { - dmi_write(target, DMI_ABSTRACTAUTO, 0); - riscv_get_register(target, &value, GDB_REGNO_S0); - - COMPLIANCE_TEST(testvar == value, \ - "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); - } + testvar = 0; + COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_S0, 0), + "Need to be able to write S0 to test ABSTRACTAUTO"); + struct riscv_program program; + riscv_program_init(&program, target); + /* This is also testing that WFI() is a NOP during debug mode. */ + riscv_program_insert(&program, wfi()); + riscv_program_addi(&program, GDB_REGNO_S0, GDB_REGNO_S0, 1); + riscv_program_ebreak(&program); + dmi_write(target, DMI_ABSTRACTAUTO, 0x0); + riscv_program_exec(&program, target); + testvar++; + dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); + dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); + uint32_t autoexec_data = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECDATA); + uint32_t autoexec_progbuf = get_field(abstractauto, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF); + for (unsigned int i = 0; i < 12; i++) { + dmi_read(target, &testvar_read, DMI_DATA0 + i); + do { + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); + } while (busy); + if (autoexec_data & (1 << i)) { + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_DATACOUNT), + "AUTOEXEC may be writable up to DATACOUNT bits."); + testvar++; + } + } + for (unsigned int i = 0; i < 16; i++) { + dmi_read(target, &testvar_read, DMI_PROGBUF0 + i); + do { + dmi_read(target, &testvar_read, DMI_ABSTRACTCS); + busy = get_field(testvar_read, DMI_ABSTRACTCS_BUSY); + } while (busy); + if (autoexec_progbuf & (1 << i)) { + COMPLIANCE_TEST(i < get_field(abstractcs, DMI_ABSTRACTCS_PROGBUFSIZE), + "AUTOEXEC may be writable up to PROGBUFSIZE bits."); + testvar++; + } + } + + dmi_write(target, DMI_ABSTRACTAUTO, 0); + COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &value, GDB_REGNO_S0), + "Need to be able to read S0 to test ABSTRACTAUTO"); + + COMPLIANCE_TEST(testvar == value, + "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); + } + + } /* Single-Step each hart. */ for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++) { @@ -3293,7 +3260,7 @@ int riscv013_test_compliance(struct target *target) riscv013_on_step(target); riscv013_step_current_hart(target); COMPLIANCE_TEST(riscv_halt_reason(target, hartsel) == RISCV_HALT_SINGLESTEP, - "Single Step should result in SINGLESTEP"); + "Single Step should result in SINGLESTEP"); } /* Core Register Tests */ @@ -3302,11 +3269,11 @@ int riscv013_test_compliance(struct target *target) riscv_set_current_hartid(target, hartsel); /* DCSR Tests */ - riscv_set_register(target, GDB_REGNO_DCSR, 0x0); - riscv_get_register(target, &value, GDB_REGNO_DCSR); + register_write_direct(target, GDB_REGNO_DCSR, 0x0); + register_read_direct(target, &value, GDB_REGNO_DCSR); COMPLIANCE_TEST(value != 0, "Not all bits in DCSR are writable by Debugger"); - riscv_set_register(target, GDB_REGNO_DCSR, 0xFFFFFFFF); - riscv_get_register(target, &value, GDB_REGNO_DCSR); + register_write_direct(target, GDB_REGNO_DCSR, 0xFFFFFFFF); + register_read_direct(target, &value, GDB_REGNO_DCSR); COMPLIANCE_TEST(value != 0, "At least some bits in DCSR must be 1"); /* DPC. Note that DPC is sign-extended. */ @@ -3319,12 +3286,12 @@ int riscv013_test_compliance(struct target *target) if (riscv_supports_extension(target, riscv_current_hartid(target), 'C')) dpcmask |= 0x2; - riscv_set_register(target, GDB_REGNO_DPC, dpcmask); - riscv_get_register(target, &dpc, GDB_REGNO_DPC); + register_write_direct(target, GDB_REGNO_DPC, dpcmask); + register_read_direct(target, &dpc, GDB_REGNO_DPC); COMPLIANCE_TEST(dpcmask == dpc, - "DPC must be sign-extended to XLEN and writable to all-1s (except the least significant bits)"); - riscv_set_register(target, GDB_REGNO_DPC, 0); - riscv_get_register(target, &dpc, GDB_REGNO_DPC); + "DPC must be sign-extended to XLEN and writable to all-1s (except the least significant bits)"); + register_write_direct(target, GDB_REGNO_DPC, 0); + register_read_direct(target, &dpc, GDB_REGNO_DPC); COMPLIANCE_TEST(dpc == 0, "DPC must be writable to 0."); if (hartsel == 0) bogus_dpc = dpc; /* For a later test step */ @@ -3389,7 +3356,7 @@ int riscv013_test_compliance(struct target *target) just verify that at least it's not the bogus value anymore. */ COMPLIANCE_TEST(bogus_dpc != 0xdeadbeef, "BOGUS DPC should have been set somehow (bug in compliance test)"); - riscv_get_register(target, &value, GDB_REGNO_DPC); + register_read_direct(target, &value, GDB_REGNO_DPC); COMPLIANCE_TEST(bogus_dpc != value, "NDMRESET should move DPC to reset value."); COMPLIANCE_TEST(riscv_halt_reason(target, 0) == RISCV_HALT_INTERRUPT, From 30e1dbdc6bc08b276b7ec23f8edb81f89d91780e Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 10:43:36 -0700 Subject: [PATCH 36/53] riscv-compliance: fix compile errors and whitespace --- src/target/riscv/riscv-013.c | 32 +++++++++++++++----------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index c250c7e7b..202408846 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -281,7 +281,7 @@ static void decode_dmi(char *text, unsigned address, unsigned data) { DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" }, { DMI_DMCONTROL, ((1L<<10)-1) << DMI_DMCONTROL_HARTSELLO_OFFSET, "hartsello" }, /* TODO: hartsellhi */ - { DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" }, + { DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" }, { DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" }, { DMI_DMSTATUS, DMI_DMSTATUS_IMPEBREAK, "impebreak" }, @@ -2977,7 +2977,7 @@ int riscv013_test_compliance(struct target *target) "DMCONTROL.hartsello should hold Hart ID 0"); /* hartreset */ - /* This field is optional. Either we can read and write it to 1/0, + /* This field is optional. Either we can read and write it to 1/0, or it is tied to 0. */ dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTRESET, 1); dmi_write(target, DMI_DMCONTROL, dmcontrol); @@ -3006,7 +3006,7 @@ int riscv013_test_compliance(struct target *target) /* This bit is not actually readable according to the spec, so nothing to check.*/ /* DMSTATUS */ - uint32_t dmstatus, dmstatus_read; + uint32_t dmstatus, dmstatus_read; dmi_read(target, &dmstatus, DMI_DMSTATUS); dmi_write(target, DMI_DMSTATUS, ~dmstatus); dmi_read(target, &dmstatus_read, DMI_DMSTATUS); @@ -3032,11 +3032,11 @@ int riscv013_test_compliance(struct target *target) /* $dscratch CSRs */ uint32_t nscratch = get_field(hartinfo, DMI_HARTINFO_NSCRATCH); for (unsigned int d = 0; d < nscratch; d++) { - riscv_reg_t testval, testval_read; + riscv_reg_t testval, testval_read; /* Because DSCRATCH is not guaranteed to last across PB executions, need to put this all into one PB execution. Which may not be possible on all implementations.*/ - if (info->progbufsize >= 5) { - for (testval = 0x0011223300112233; + if (info->progbufsize >= 5) { + for (testval = 0x0011223300112233; testval != 0xDEAD; testval = testval == 0x0011223300112233 ? ~testval : 0xDEAD) { COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, testval) == ERROR_OK, @@ -3059,7 +3059,7 @@ int riscv013_test_compliance(struct target *target) "All DSCRATCH registers in HARTINFO must be R/W."); } } - } + } } /* TODO: dataaccess */ if (get_field(hartinfo, DMI_HARTINFO_DATAACCESS)) { @@ -3177,17 +3177,16 @@ int riscv013_test_compliance(struct target *target) /* Basic Abstract Commands */ for (unsigned int i = 1; i < 32; i = i << 1) { riscv_reg_t testval = i | ((i + 1ULL) << 32); - riscv_reg_t testval_read; + riscv_reg_t testval_read; COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_ZERO + i, testval), "GPR Writes should be supported."); write_abstract_arg(target, 0, 0xDEADBEEFDEADBEEF, 64); COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i), "GPR Reads should be supported."); if (riscv_xlen(target) > 32) { - COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); + COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); } else { - COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); - + COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); } } @@ -3203,7 +3202,7 @@ int riscv013_test_compliance(struct target *target) a true compliance requirement. */ if (info->progbufsize >= 3) { - testvar = 0; + testvar = 0; COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_S0, 0), "Need to be able to write S0 to test ABSTRACTAUTO"); struct riscv_program program; @@ -3243,16 +3242,15 @@ int riscv013_test_compliance(struct target *target) testvar++; } } - + dmi_write(target, DMI_ABSTRACTAUTO, 0); COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &value, GDB_REGNO_S0), "Need to be able to read S0 to test ABSTRACTAUTO"); - + COMPLIANCE_TEST(testvar == value, "ABSTRACTAUTO should cause COMMAND to run the expected number of times."); - } - - } + } + } /* Single-Step each hart. */ for (int hartsel = 0; hartsel < riscv_count_harts(target); hartsel++) { From aef488824917caa31d8b611192e816d2fc28f54f Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 11:55:50 -0700 Subject: [PATCH 37/53] riscv-compliance: Fix writing hartsello --- src/target/riscv/riscv-013.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 202408846..c062de134 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2964,7 +2964,7 @@ int riscv013_test_compliance(struct target *target) RISCV013_INFO(info); /* TODO: Support HARTSELLHI as well */ - dmcontrol = set_field(dmcontrol_orig, DMI_DMCONTROL_HARTSELLO, RISCV_MAX_HARTS-1); + dmcontrol = dmcontrol_orig | DMI_DMCONTROL_HARTSELLO; dmi_write(target, DMI_DMCONTROL, dmcontrol); dmi_read(target, &dmcontrol, DMI_DMCONTROL); COMPLIANCE_TEST(get_field(dmcontrol, DMI_DMCONTROL_HARTSELLO) == (uint32_t) ((1 << info->hartsellen) - 1), From f516825079b8965e9c0bb6bea5146e7045807ca0 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 14:30:37 -0700 Subject: [PATCH 38/53] riscv-compliance: make sure not to clear DMACTIVE --- src/target/riscv/riscv-013.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index c062de134..9d7bb95d8 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2956,7 +2956,7 @@ int riscv013_test_compliance(struct target *target) int total_tests = 0; int passed_tests = 0; - uint32_t dmcontrol_orig = 0; + uint32_t dmcontrol_orig = DMI_DMCONTROL_DMACTIVE; uint32_t dmcontrol; uint32_t testvar; uint32_t testvar_read; @@ -3320,7 +3320,6 @@ int riscv013_test_compliance(struct target *target) /* Pulse reset. */ target->reset_halt = true; - dmi_read(target, &dmcontrol, DMI_DMCONTROL); riscv_set_current_hartid(target, 0); assert_reset(target); deassert_reset(target); From 401dcf7a06c707f01aca0f0ad147fcc65a847a1d Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 15:47:15 -0700 Subject: [PATCH 39/53] riscv-compliance: make sure reset assertion and deassertion actually worked. --- src/target/riscv/riscv-013.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 9d7bb95d8..3af52f902 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3318,11 +3318,10 @@ int riscv013_test_compliance(struct target *target) dmi_read(target, &abstractauto, DMI_ABSTRACTAUTO); /* Pulse reset. */ - target->reset_halt = true; riscv_set_current_hartid(target, 0); - assert_reset(target); - deassert_reset(target); + COMPLIANCE_TEST(ERROR_OK == assert_reset(target), "Must be able to assert NDMRESET"); + COMPLIANCE_TEST(ERROR_OK == deassert_reset(target), "Must be able to deassert NDMRESET"); /* Verify that most stuff is not affected by ndmreset. */ dmi_read(target, &testvar_read, DMI_COMMAND); From 8ce4f787ca429cedac4da9c8931ac702d270ebb4 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 16:05:15 -0700 Subject: [PATCH 40/53] riscv-compliance: whitespace cleanup --- src/target/riscv/riscv-013.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 6e560e2e1..c7d506835 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1598,9 +1598,15 @@ static int deassert_reset(struct target *target) if (target->reset_halt) { LOG_DEBUG("Waiting for hart %d to halt out of reset.", index); + /* set this temporarily because this read could take the entire + * time the hart takes to come out of reset. */ + int saved_riscv_command_timeout_sec = riscv_command_timeout_sec; + riscv_command_timeout_sec = MAX(riscv_reset_timeout_sec, riscv_command_timeout_sec); do { if (dmstatus_read(target, &dmstatus, true) != ERROR_OK) return ERROR_FAIL; + if (get_field(dmstatus, DMI_DMSTATUS_ALLHALTED) == 1) + break; if (time(NULL) - start > riscv_reset_timeout_sec) { LOG_ERROR("Hart %d didn't halt coming out of reset in %ds; " "dmstatus=0x%x; " @@ -1610,9 +1616,11 @@ static int deassert_reset(struct target *target) } } while (get_field(dmstatus, DMI_DMSTATUS_ALLHALTED) == 0); target->state = TARGET_HALTED; - + riscv_command_timeout_sec = saved_riscv_command_timeout_sec; } else { LOG_DEBUG("Waiting for hart %d to run out of reset.", index); + int saved_riscv_command_timeout_sec = riscv_command_timeout_sec; + riscv_command_timeout_sec = MAX(riscv_reset_timeout_sec, riscv_command_timeout_sec); while (get_field(dmstatus, DMI_DMSTATUS_ALLRUNNING) == 0) { if (dmstatus_read(target, &dmstatus, true) != ERROR_OK) return ERROR_FAIL; @@ -1622,6 +1630,8 @@ static int deassert_reset(struct target *target) index, dmstatus); return ERROR_FAIL; } + if (get_field(dmstatus, DMI_DMSTATUS_ALLRUNNING) == 1) + break; if (time(NULL) - start > riscv_reset_timeout_sec) { LOG_ERROR("Hart %d didn't run coming out of reset in %ds; " "dmstatus=0x%x; " @@ -1631,6 +1641,7 @@ static int deassert_reset(struct target *target) } } target->state = TARGET_RUNNING; + riscv_command_timeout_sec = saved_riscv_command_timeout_sec; } if (get_field(dmstatus, DMI_DMSTATUS_ALLHAVERESET)) { @@ -3202,11 +3213,10 @@ int riscv013_test_compliance(struct target *target) write_abstract_arg(target, 0, 0xDEADBEEFDEADBEEF, 64); COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i), "GPR Reads should be supported."); - if (riscv_xlen(target) > 32) { + if (riscv_xlen(target) > 32) COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); - } else { + else COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); - } } /* ABSTRACTAUTO @@ -3221,7 +3231,7 @@ int riscv013_test_compliance(struct target *target) a true compliance requirement. */ if (info->progbufsize >= 3) { - testvar = 0; + testvar = 0; COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_S0, 0), "Need to be able to write S0 to test ABSTRACTAUTO"); struct riscv_program program; From 8fa81c1f979e19e313b8a83e5f23dd19feca1e46 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Tue, 17 Apr 2018 16:11:03 -0700 Subject: [PATCH 41/53] riscv-compliance... code that compiles > code that makes linter happy --- src/target/riscv/riscv-013.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index c7d506835..85d0ca966 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3213,10 +3213,11 @@ int riscv013_test_compliance(struct target *target) write_abstract_arg(target, 0, 0xDEADBEEFDEADBEEF, 64); COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i), "GPR Reads should be supported."); - if (riscv_xlen(target) > 32) + if (riscv_xlen(target) > 32) { COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); - else + } else { COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); + } } /* ABSTRACTAUTO From 1616a710734fb9a0278412b0c0e947f6499d054e Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 18 Apr 2018 15:44:57 -0700 Subject: [PATCH 42/53] riscv: attempt something else for travis (probably won't work otherwise Tim would have already done it this way...) --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 2aeed080b..452bcab39 100644 --- a/.travis.yml +++ b/.travis.yml @@ -55,6 +55,6 @@ script: # 50 changes any case. Most merges won't consist of more than 40 changes, # so this should work fine most of the time, and be a lot better than not # checking at all. - - git diff HEAD~40 | ./tools/scripts/checkpatch.pl --no-signoff - + - git diff origin/riscv | ./tools/scripts/checkpatch.pl --no-signoff - - ./bootstrap && ./configure --enable-remote-bitbang --enable-jtag_vpi $CONFIGURE_ARGS && make - file src/$EXECUTABLE From 06fc61f464dfcf7e61f5efb93903803977a74536 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 18 Apr 2018 16:10:41 -0700 Subject: [PATCH 43/53] riscv-compliance: whitespace --- src/target/riscv/riscv-013.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index f39aa7040..1de3b92bf 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3213,7 +3213,7 @@ int riscv013_test_compliance(struct target *target) COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); } else { COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); - } + } } /* ABSTRACTAUTO From ac953c71c0bcf7a2fcc17080ae199ad91c677353 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 18 Apr 2018 16:15:07 -0700 Subject: [PATCH 44/53] riscv-compliance: add dummy comments to appease the linter --- src/target/riscv/riscv-013.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 1de3b92bf..92f290b6f 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3210,8 +3210,10 @@ int riscv013_test_compliance(struct target *target) COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i), "GPR Reads should be supported."); if (riscv_xlen(target) > 32) { + /* Dummy comment to satisfy linter, since removing the brances here doesn't actually compile. */ COMPLIANCE_TEST(testval == testval_read, "GPR Reads and writes should be supported."); } else { + /* Dummy comment to satisfy linter, since removing the brances here doesn't actually compile. */ COMPLIANCE_TEST((testval & 0xFFFFFFFF) == testval_read, "GPR Reads and writes should be supported."); } } From debf2b040a98202105aeae733e7dfe4d43c0f8eb Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 19 Apr 2018 10:36:52 -0700 Subject: [PATCH 45/53] riscv-compliance: correct the HALTSUM0/HALTSUM1 checks --- src/target/riscv/riscv-013.c | 41 +++++++++++++++++------------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 92f290b6f..f1b14c7a4 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3100,15 +3100,16 @@ int riscv013_test_compliance(struct target *target) } - /* HALTSUM -- TODO: More than 32 harts */ + /* HALTSUM -- TODO: More than 32 harts. Would need to loop over this to set hartsel */ /* TODO: HALTSUM2, HALTSUM3 */ + /* HALTSUM0 */ uint32_t expected_haltsum0 = 0; - for (int i = 0; i < riscv_count_harts(target); i += 32) - expected_haltsum0 |= (1 << (i / 32)); + for (int i = 0; i < MIN(riscv_count_harts(target), 32); i ++) + expected_haltsum0 |= (1 << i); dmi_read(target, &testvar_read, DMI_HALTSUM0); COMPLIANCE_TEST(testvar_read == expected_haltsum0, - "HALTSUM0 should report summary of 32 halted harts"); + "HALTSUM0 should report summary of up to 32 halted harts"); dmi_write(target, DMI_HALTSUM0, 0xffffffff); dmi_read(target, &testvar_read, DMI_HALTSUM0); @@ -3118,26 +3119,22 @@ int riscv013_test_compliance(struct target *target) dmi_read(target, &testvar_read, DMI_HALTSUM0); COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should be R/O"); - for (int i = 0; i < 32/*TODO: riscv_count_harts(target)*/; i += 32) { - /* TODO: Set hartsel for i > 32 harts. */ - dmi_read(target, &testvar_read, DMI_HALTSUM1); - uint32_t haltsum1_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? - 0xFFFFFFFFU : - ((1U << (riscv_count_harts(target) % 32)) - 1); - COMPLIANCE_TEST(testvar_read == haltsum1_expected, - "HALTSUM1 should report summary of 1024 halted harts"); + /* HALTSUM1 */ + uint32_t expected_haltsum1 = 0; + for (int i = 0; i < MIN(riscv_count_harts(target), 1024); i +=32) + expected_haltsum1 |= (1 << (i/32)); - /* Just have to check this once */ - if (i == 0) { - dmi_write(target, DMI_HALTSUM1, 0xffffffff); - dmi_read(target, &testvar_read, DMI_HALTSUM1); - COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should be R/O"); + dmi_read(target, &testvar_read, DMI_HALTSUM1); + COMPLIANCE_TEST(testvar_read == expected_haltsum1, + "HALTSUM1 should report summary of up to 1024 halted harts"); - dmi_write(target, DMI_HALTSUM1, 0x0); - dmi_read(target, &testvar_read, DMI_HALTSUM1); - COMPLIANCE_TEST(testvar_read == haltsum1_expected, "HALTSUM1 should be R/O"); - } - } + dmi_write(target, DMI_HALTSUM1, 0xffffffff); + dmi_read(target, &testvar_read, DMI_HALTSUM1); + COMPLIANCE_TEST(testvar_read == expected_haltsum1, "HALTSUM1 should be R/O"); + + dmi_write(target, DMI_HALTSUM1, 0x0); + dmi_read(target, &testvar_read, DMI_HALTSUM1); + COMPLIANCE_TEST(testvar_read == expected_haltsum1, "HALTSUM1 should be R/O"); /* TODO: HAWINDOWSEL */ From eeac4f7fd4a607d2acffd8bfb9ac2e2d5ed45bcb Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 19 Apr 2018 10:49:45 -0700 Subject: [PATCH 46/53] riscv-compliance: remove whitespace --- src/target/riscv/riscv-013.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index f1b14c7a4..632a76e5e 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3102,9 +3102,9 @@ int riscv013_test_compliance(struct target *target) /* HALTSUM -- TODO: More than 32 harts. Would need to loop over this to set hartsel */ /* TODO: HALTSUM2, HALTSUM3 */ - /* HALTSUM0 */ + /* HALTSUM0 */ uint32_t expected_haltsum0 = 0; - for (int i = 0; i < MIN(riscv_count_harts(target), 32); i ++) + for (int i = 0; i < MIN(riscv_count_harts(target), 32); i++) expected_haltsum0 |= (1 << i); dmi_read(target, &testvar_read, DMI_HALTSUM0); @@ -3120,18 +3120,18 @@ int riscv013_test_compliance(struct target *target) COMPLIANCE_TEST(testvar_read == expected_haltsum0, "HALTSUM0 should be R/O"); /* HALTSUM1 */ - uint32_t expected_haltsum1 = 0; - for (int i = 0; i < MIN(riscv_count_harts(target), 1024); i +=32) + uint32_t expected_haltsum1 = 0; + for (int i = 0; i < MIN(riscv_count_harts(target), 1024); i += 32) expected_haltsum1 |= (1 << (i/32)); - dmi_read(target, &testvar_read, DMI_HALTSUM1); + dmi_read(target, &testvar_read, DMI_HALTSUM1); COMPLIANCE_TEST(testvar_read == expected_haltsum1, "HALTSUM1 should report summary of up to 1024 halted harts"); dmi_write(target, DMI_HALTSUM1, 0xffffffff); dmi_read(target, &testvar_read, DMI_HALTSUM1); COMPLIANCE_TEST(testvar_read == expected_haltsum1, "HALTSUM1 should be R/O"); - + dmi_write(target, DMI_HALTSUM1, 0x0); dmi_read(target, &testvar_read, DMI_HALTSUM1); COMPLIANCE_TEST(testvar_read == expected_haltsum1, "HALTSUM1 should be R/O"); From 5a7f86b2f4ce10abce31467aca2e7dfabe467665 Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Wed, 29 Aug 2018 15:34:03 -0700 Subject: [PATCH 47/53] Use official mirror of jimtcl The repo.or.cz version is often unavailable. Presumably we want to do something similar for the other submodules, but I didn't find as obvious official mirrors for those. --- .gitmodules | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitmodules b/.gitmodules index 5865ff92a..81f674924 100644 --- a/.gitmodules +++ b/.gitmodules @@ -3,7 +3,7 @@ url = http://repo.or.cz/r/git2cl.git [submodule "jimtcl"] path = jimtcl - url = http://repo.or.cz/r/jimtcl.git + url = https://github.com/msteveb/jimtcl [submodule "src/jtag/drivers/libjaylink"] path = src/jtag/drivers/libjaylink url = http://repo.or.cz/r/libjaylink.git From b3ddfc70e850fdc58c3a7b5a823b2129c111e7e7 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 29 Aug 2018 16:03:38 -0700 Subject: [PATCH 48/53] Flatten git2cl submodule --- .gitmodules | 3 - tools/git2cl | 1 - tools/git2cl/COPYING | 339 +++++++++++++++++++++++++++++++++ tools/git2cl/README | 45 +++++ tools/git2cl/README.html | 392 +++++++++++++++++++++++++++++++++++++++ tools/git2cl/git2cl | 372 +++++++++++++++++++++++++++++++++++++ 6 files changed, 1148 insertions(+), 4 deletions(-) delete mode 160000 tools/git2cl create mode 100644 tools/git2cl/COPYING create mode 100644 tools/git2cl/README create mode 100644 tools/git2cl/README.html create mode 100755 tools/git2cl/git2cl diff --git a/.gitmodules b/.gitmodules index 81f674924..548febe94 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,6 +1,3 @@ -[submodule "tools/git2cl"] - path = tools/git2cl - url = http://repo.or.cz/r/git2cl.git [submodule "jimtcl"] path = jimtcl url = https://github.com/msteveb/jimtcl diff --git a/tools/git2cl b/tools/git2cl deleted file mode 160000 index 8373c9f74..000000000 --- a/tools/git2cl +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8373c9f74993e218a08819cbcdbab3f3564bbeba diff --git a/tools/git2cl/COPYING b/tools/git2cl/COPYING new file mode 100644 index 000000000..d511905c1 --- /dev/null +++ b/tools/git2cl/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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Any attempt +otherwise to copy, modify, sublicense or distribute the Program is +void, and will automatically terminate your rights under this License. +However, parties who have received copies, or rights, from you under +this License will not have their licenses terminated so long as such +parties remain in full compliance. + + 5. You are not required to accept this License, since you have not +signed it. However, nothing else grants you permission to modify or +distribute the Program or its derivative works. These actions are +prohibited by law if you do not accept this License. Therefore, by +modifying or distributing the Program (or any work based on the +Program), you indicate your acceptance of this License to do so, and +all its terms and conditions for copying, distributing or modifying +the Program or works based on it. + + 6. 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The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS + + How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/tools/git2cl/README b/tools/git2cl/README new file mode 100644 index 000000000..40840807e --- /dev/null +++ b/tools/git2cl/README @@ -0,0 +1,45 @@ +git2cl +====== + +This is a quick'n'dirty tool to convert git logs to GNU ChangeLog +format. + +The tool invokes 'git log' internally unless you pipe a log to it. +Thus, typically you would use it as follows: + +........................................................................... +jas@mocca:~/src/libtasn1$ git2cl > ChangeLog +jas@mocca:~/src/libtasn1$ +........................................................................... + +If you don't want git2cl to invoke git log internally, you can use it +as a pipe. It needs a git log generated with --pretty --numstat and +--summary. You can use it as follows: + +........................................................................... +jas@mocca:~/src/libtasn1$ git log --pretty --numstat --summary | ~/src/git2cl/git2cl > ChangeLog +jas@mocca:~/src/libtasn1$ +........................................................................... + +The output format is specified by: + +link:http://www.gnu.org/prep/standards/html_node/Change-Logs.html[] + +My inspiration for writing this tool was the +link:http://www.red-bean.com/cvs2cl/[cvs2cl] tool, which I have been +using in several projects. Replacing it was necessary to seriously +consider switching from CVS to GIT for my projects. + +The canonical home page for git2cl is: +link:http://josefsson.org/git2cl/[] and its repository can be found at +link:http://repo.or.cz/w/git2cl.git[]. + +Credits +------- + +Luis Mondesi contributed several improvements. + +Support +------- + +Try talking to mailto:simon@josefsson.org[Simon Josefsson]. diff --git a/tools/git2cl/README.html b/tools/git2cl/README.html new file mode 100644 index 000000000..f82da5d6e --- /dev/null +++ b/tools/git2cl/README.html @@ -0,0 +1,392 @@ + + + + + + +git2cl + + + +
+
+

This is a quick'n'dirty tool to convert git logs to GNU ChangeLog +format.

+

The tool invokes git log internally unless you pipe a log to it. +Thus, typically you would use it as follows:

+
+
+
jas@mocca:~/src/libtasn1$ git2cl > ChangeLog
+jas@mocca:~/src/libtasn1$
+
+

If you don't want git2cl to invoke git log internally, you can use it +as a pipe. It needs a git log generated with —pretty —numstat and +—summary. You can use it as follows:

+
+
+
jas@mocca:~/src/libtasn1$ git log --pretty --numstat --summary | ~/src/git2cl/git2cl > ChangeLog
+jas@mocca:~/src/libtasn1$
+
+

The output format is specified by:

+

http://www.gnu.org/prep/standards/html_node/Change-Logs.html

+

My inspiration for writing this tool was the +cvs2cl tool, which I have been +using in several projects. Replacing it was necessary to seriously +consider switching from CVS to GIT for my projects.

+

The canonical home page for git2cl is: +http://josefsson.org/git2cl/ and its repository can be found at +http://repo.or.cz/w/git2cl.git.

+
+
+

Credits

+
+

Luis Mondesi contributed several improvements.

+
+

Support

+
+

Try talking to Simon Josefsson.

+
+ + + diff --git a/tools/git2cl/git2cl b/tools/git2cl/git2cl new file mode 100755 index 000000000..1c2ab3fc1 --- /dev/null +++ b/tools/git2cl/git2cl @@ -0,0 +1,372 @@ +#!/usr/bin/perl + +# Copyright (C) 2007, 2008 Simon Josefsson +# Copyright (C) 2007 Luis Mondesi +# * calls git directly. To use it just: +# cd ~/Project/my_git_repo; git2cl > ChangeLog +# * implements strptime() +# * fixes bugs in $comment parsing +# - copy input before we remove leading spaces +# - skip "merge branch" statements as they don't +# have information about files (i.e. we never +# go into $state 2) +# - behaves like a pipe/filter if input is given from the CLI +# else it calls git log by itself +# +# The functions mywrap, last_line_len, wrap_log_entry are derived from +# the cvs2cl tool, see : +# Copyright (C) 2001,2002,2003,2004 Martyn J. Pearce +# Copyright (C) 1999 Karl Fogel +# +# git2cl is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# git2cl is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with git2cl; see the file COPYING. If not, write to the Free +# Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +use strict; +use POSIX qw(strftime); +use Text::Wrap qw(wrap); +use FileHandle; + +use constant EMPTY_LOG_MESSAGE => '*** empty log message ***'; + +# this is a helper hash for stptime. +# Assumes you are calling 'git log ...' with LC_ALL=C +my %month = ( + 'Jan'=>0, + 'Feb'=>1, + 'Mar'=>2, + 'Apr'=>3, + 'May'=>4, + 'Jun'=>5, + 'Jul'=>6, + 'Aug'=>7, + 'Sep'=>8, + 'Oct'=>9, + 'Nov'=>10, + 'Dec'=>11, +); + +my $fh = new FileHandle; + +sub key_ready +{ + my ($rin, $nfd); + vec($rin, fileno(STDIN), 1) = 1; + return $nfd = select($rin, undef, undef, 0); +} + +sub strptime { + my $str = shift; + return undef if not defined $str; + + # we are parsing this format + # Fri Oct 26 00:42:56 2007 -0400 + # to these fields + # sec, min, hour, mday, mon, year, wday = -1, yday = -1, isdst = -1 + # Luis Mondesi + my @date; + if ($str =~ /([[:alpha:]]{3})\s+([[:alpha:]]{3})\s+([[:digit:]]{1,2})\s+([[:digit:]]{1,2}):([[:digit:]]{1,2}):([[:digit:]]{1,2})\s+([[:digit:]]{4})/){ + push(@date,$6,$5,$4,$3,$month{$2},($7 - 1900),-1,-1,-1); + } else { + die ("Cannot parse date '$str'\n'"); + } + return @date; +} + +sub mywrap { + my ($indent1, $indent2, @text) = @_; + # If incoming text looks preformatted, don't get clever + my $text = Text::Wrap::wrap($indent1, $indent2, @text); + if ( grep /^\s+/m, @text ) { + return $text; + } + my @lines = split /\n/, $text; + $indent2 =~ s!^((?: {8})+)!"\t" x (length($1)/8)!e; + $lines[0] =~ s/^$indent1\s+/$indent1/; + s/^$indent2\s+/$indent2/ + for @lines[1..$#lines]; + my $newtext = join "\n", @lines; + $newtext .= "\n" + if substr($text, -1) eq "\n"; + return $newtext; +} + +sub last_line_len { + my $files_list = shift; + my @lines = split (/\n/, $files_list); + my $last_line = pop (@lines); + return length ($last_line); +} + +# A custom wrap function, sensitive to some common constructs used in +# log entries. +sub wrap_log_entry { + my $text = shift; # The text to wrap. + my $left_pad_str = shift; # String to pad with on the left. + + # These do NOT take left_pad_str into account: + my $length_remaining = shift; # Amount left on current line. + my $max_line_length = shift; # Amount left for a blank line. + + my $wrapped_text = ''; # The accumulating wrapped entry. + my $user_indent = ''; # Inherited user_indent from prev line. + + my $first_time = 1; # First iteration of the loop? + my $suppress_line_start_match = 0; # Set to disable line start checks. + + my @lines = split (/\n/, $text); + while (@lines) # Don't use `foreach' here, it won't work. + { + my $this_line = shift (@lines); + chomp $this_line; + + if ($this_line =~ /^(\s+)/) { + $user_indent = $1; + } + else { + $user_indent = ''; + } + + # If it matches any of the line-start regexps, print a newline now... + if ($suppress_line_start_match) + { + $suppress_line_start_match = 0; + } + elsif (($this_line =~ /^(\s*)\*\s+[a-zA-Z0-9]/) + || ($this_line =~ /^(\s*)\* [a-zA-Z0-9_\.\/\+-]+/) + || ($this_line =~ /^(\s*)\([a-zA-Z0-9_\.\/\+-]+(\)|,\s*)/) + || ($this_line =~ /^(\s+)(\S+)/) + || ($this_line =~ /^(\s*)- +/) + || ($this_line =~ /^()\s*$/) + || ($this_line =~ /^(\s*)\*\) +/) + || ($this_line =~ /^(\s*)[a-zA-Z0-9](\)|\.|\:) +/)) + { + $length_remaining = $max_line_length - (length ($user_indent)); + } + + # Now that any user_indent has been preserved, strip off leading + # whitespace, so up-folding has no ugly side-effects. + $this_line =~ s/^\s*//; + + # Accumulate the line, and adjust parameters for next line. + my $this_len = length ($this_line); + if ($this_len == 0) + { + # Blank lines should cancel any user_indent level. + $user_indent = ''; + $length_remaining = $max_line_length; + } + elsif ($this_len >= $length_remaining) # Line too long, try breaking it. + { + # Walk backwards from the end. At first acceptable spot, break + # a new line. + my $idx = $length_remaining - 1; + if ($idx < 0) { $idx = 0 }; + while ($idx > 0) + { + if (substr ($this_line, $idx, 1) =~ /\s/) + { + my $line_now = substr ($this_line, 0, $idx); + my $next_line = substr ($this_line, $idx); + $this_line = $line_now; + + # Clean whitespace off the end. + chomp $this_line; + + # The current line is ready to be printed. + $this_line .= "\n${left_pad_str}"; + + # Make sure the next line is allowed full room. + $length_remaining = $max_line_length - (length ($user_indent)); + + # Strip next_line, but then preserve any user_indent. + $next_line =~ s/^\s*//; + + # Sneak a peek at the user_indent of the upcoming line, so + # $next_line (which will now precede it) can inherit that + # indent level. Otherwise, use whatever user_indent level + # we currently have, which might be none. + my $next_next_line = shift (@lines); + if ((defined ($next_next_line)) && ($next_next_line =~ /^(\s+)/)) { + $next_line = $1 . $next_line if (defined ($1)); + # $length_remaining = $max_line_length - (length ($1)); + $next_next_line =~ s/^\s*//; + } + else { + $next_line = $user_indent . $next_line; + } + if (defined ($next_next_line)) { + unshift (@lines, $next_next_line); + } + unshift (@lines, $next_line); + + # Our new next line might, coincidentally, begin with one of + # the line-start regexps, so we temporarily turn off + # sensitivity to that until we're past the line. + $suppress_line_start_match = 1; + + last; + } + else + { + $idx--; + } + } + + if ($idx == 0) + { + # We bottomed out because the line is longer than the + # available space. But that could be because the space is + # small, or because the line is longer than even the maximum + # possible space. Handle both cases below. + + if ($length_remaining == ($max_line_length - (length ($user_indent)))) + { + # The line is simply too long -- there is no hope of ever + # breaking it nicely, so just insert it verbatim, with + # appropriate padding. + $this_line = "\n${left_pad_str}${this_line}"; + } + else + { + # Can't break it here, but may be able to on the next round... + unshift (@lines, $this_line); + $length_remaining = $max_line_length - (length ($user_indent)); + $this_line = "\n${left_pad_str}"; + } + } + } + else # $this_len < $length_remaining, so tack on what we can. + { + # Leave a note for the next iteration. + $length_remaining = $length_remaining - $this_len; + + if ($this_line =~ /\.$/) + { + $this_line .= " "; + $length_remaining -= 2; + } + else # not a sentence end + { + $this_line .= " "; + $length_remaining -= 1; + } + } + + # Unconditionally indicate that loop has run at least once. + $first_time = 0; + + $wrapped_text .= "${user_indent}${this_line}"; + } + + # One last bit of padding. + $wrapped_text .= "\n"; + + return $wrapped_text; +} + +# main + +my @date; +my $author; +my @files; +my $comment; + +my $state; # 0-header 1-comment 2-files +my $done = 0; + +$state = 0; + +# if reading from STDIN, we assume that we are +# getting git log as input +if (key_ready()) +{ + + #my $dummyfh; # don't care about writing + #($fh,$dummyfh) = FileHandle::pipe; + $fh->fdopen(*STDIN, 'r'); +} +else +{ + $fh->open("LC_ALL=C git log --pretty --numstat --summary|") + or die("Cannot execute git log...$!\n"); +} + +while (my $_l = <$fh>) { + #print STDERR "debug ($state, " . (@date ? (strftime "%Y-%m-%d", @date) : "") . "): `$_'\n"; + if ($state == 0) { + if ($_l =~ m,^Author: (.*),) { + $author = $1; + } + if ($_l =~ m,^Date: (.*),) { + @date = strptime($1); + } + $state = 1 if ($_l =~ m,^$, and $author and (@date+0>0)); + } elsif ($state == 1) { + # * modifying our input text is a bad choice + # let's make a copy of it first, then we remove spaces + # * if we meet a "merge branch" statement, we need to start + # over and find a real entry + # Luis Mondesi + my $_s = $_l; + $_s =~ s/^ //g; + if ($_s =~ m/^Merge branch/) + { + $state=0; + next; + } + $comment = $comment . $_s; + $state = 2 if ($_l =~ m,^$,); + } elsif ($state == 2) { + if ($_l =~ m,^([0-9]+)\t([0-9]+)\t(.*)$,) { + push @files, $3; + } + $done = 1 if ($_l =~ m,^$,); + } + + if ($done) { + print (strftime "%Y-%m-%d $author\n\n", @date); + + my $files = join (", ", @files); + $files = mywrap ("\t", "\t", "* $files"), ": "; + + if (index($comment, EMPTY_LOG_MESSAGE) > -1 ) { + $comment = "[no log message]\n"; + } + + my $files_last_line_len = 0; + $files_last_line_len = last_line_len($files) + 1; + my $msg = wrap_log_entry($comment, "\t", 69-$files_last_line_len, 69); + + $msg =~ s/[ \t]+\n/\n/g; + + print "$files: $msg\n"; + + @date = (); + $author = ""; + @files = (); + $comment = ""; + + $state = 0; + $done = 0; + } +} + +if (@date + 0) +{ + print (strftime "%Y-%m-%d $author\n\n", @date); + my $msg = wrap_log_entry($comment, "\t", 69, 69); + $msg =~ s/[ \t]+\n/\n/g; + print "\t* $msg\n"; +} From 53cb54d69a476d3ffcb494be104973d3ba24cb7e Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 29 Aug 2018 16:08:22 -0700 Subject: [PATCH 49/53] Flatten libjaylink submodule --- .gitmodules | 3 - src/jtag/drivers/libjaylink | 1 - src/jtag/drivers/libjaylink/.gitignore | 24 + src/jtag/drivers/libjaylink/AUTHORS | 2 + src/jtag/drivers/libjaylink/COPYING | 339 +++ src/jtag/drivers/libjaylink/ChangeLog | 1 + src/jtag/drivers/libjaylink/Doxyfile.in | 2301 +++++++++++++++++ src/jtag/drivers/libjaylink/HACKING | 68 + src/jtag/drivers/libjaylink/Makefile.am | 28 + src/jtag/drivers/libjaylink/NEWS | 7 + src/jtag/drivers/libjaylink/README | 70 + src/jtag/drivers/libjaylink/autogen.sh | 34 + src/jtag/drivers/libjaylink/configure.ac | 140 + .../libjaylink/contrib/99-libjaylink.rules | 41 + src/jtag/drivers/libjaylink/libjaylink.pc.in | 11 + .../drivers/libjaylink/libjaylink/Makefile.am | 62 + .../drivers/libjaylink/libjaylink/buffer.c | 140 + src/jtag/drivers/libjaylink/libjaylink/core.c | 219 ++ .../drivers/libjaylink/libjaylink/device.c | 1707 ++++++++++++ .../drivers/libjaylink/libjaylink/discovery.c | 106 + .../libjaylink/libjaylink/discovery_tcp.c | 349 +++ .../libjaylink/libjaylink/discovery_usb.c | 280 ++ .../drivers/libjaylink/libjaylink/emucom.c | 287 ++ .../drivers/libjaylink/libjaylink/error.c | 118 + .../drivers/libjaylink/libjaylink/fileio.c | 499 ++++ src/jtag/drivers/libjaylink/libjaylink/jtag.c | 259 ++ .../libjaylink/libjaylink-internal.h | 320 +++ .../libjaylink/libjaylink/libjaylink.h | 589 +++++ src/jtag/drivers/libjaylink/libjaylink/list.c | 115 + src/jtag/drivers/libjaylink/libjaylink/log.c | 266 ++ .../drivers/libjaylink/libjaylink/socket.c | 257 ++ .../drivers/libjaylink/libjaylink/strutil.c | 66 + src/jtag/drivers/libjaylink/libjaylink/swd.c | 148 ++ src/jtag/drivers/libjaylink/libjaylink/swo.c | 453 ++++ .../drivers/libjaylink/libjaylink/target.c | 533 ++++ .../drivers/libjaylink/libjaylink/transport.c | 309 +++ .../libjaylink/libjaylink/transport_tcp.c | 601 +++++ .../libjaylink/libjaylink/transport_usb.c | 620 +++++ src/jtag/drivers/libjaylink/libjaylink/util.c | 56 + .../drivers/libjaylink/libjaylink/version.c | 128 + .../libjaylink/libjaylink/version.h.in | 53 + src/jtag/drivers/libjaylink/m4/jaylink.m4 | 91 + 42 files changed, 11697 insertions(+), 4 deletions(-) delete mode 160000 src/jtag/drivers/libjaylink create mode 100644 src/jtag/drivers/libjaylink/.gitignore create mode 100644 src/jtag/drivers/libjaylink/AUTHORS create mode 100644 src/jtag/drivers/libjaylink/COPYING create mode 100644 src/jtag/drivers/libjaylink/ChangeLog create mode 100644 src/jtag/drivers/libjaylink/Doxyfile.in create mode 100644 src/jtag/drivers/libjaylink/HACKING create mode 100644 src/jtag/drivers/libjaylink/Makefile.am create mode 100644 src/jtag/drivers/libjaylink/NEWS create mode 100644 src/jtag/drivers/libjaylink/README create mode 100755 src/jtag/drivers/libjaylink/autogen.sh create mode 100644 src/jtag/drivers/libjaylink/configure.ac create mode 100644 src/jtag/drivers/libjaylink/contrib/99-libjaylink.rules create mode 100644 src/jtag/drivers/libjaylink/libjaylink.pc.in create mode 100644 src/jtag/drivers/libjaylink/libjaylink/Makefile.am create mode 100644 src/jtag/drivers/libjaylink/libjaylink/buffer.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/core.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/device.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/discovery.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/discovery_tcp.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/discovery_usb.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/emucom.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/error.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/fileio.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/jtag.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/libjaylink-internal.h create mode 100644 src/jtag/drivers/libjaylink/libjaylink/libjaylink.h create mode 100644 src/jtag/drivers/libjaylink/libjaylink/list.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/log.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/socket.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/strutil.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/swd.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/swo.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/target.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/transport.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/transport_tcp.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/transport_usb.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/util.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/version.c create mode 100644 src/jtag/drivers/libjaylink/libjaylink/version.h.in create mode 100644 src/jtag/drivers/libjaylink/m4/jaylink.m4 diff --git a/.gitmodules b/.gitmodules index 548febe94..b99c87acb 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,6 +1,3 @@ [submodule "jimtcl"] path = jimtcl url = https://github.com/msteveb/jimtcl -[submodule "src/jtag/drivers/libjaylink"] - path = src/jtag/drivers/libjaylink - url = http://repo.or.cz/r/libjaylink.git diff --git a/src/jtag/drivers/libjaylink b/src/jtag/drivers/libjaylink deleted file mode 160000 index 8645845c1..000000000 --- a/src/jtag/drivers/libjaylink +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 8645845c1abebd004e991ba9a7f808f4fd0c608b diff --git a/src/jtag/drivers/libjaylink/.gitignore b/src/jtag/drivers/libjaylink/.gitignore new file mode 100644 index 000000000..0197dc0c2 --- /dev/null +++ b/src/jtag/drivers/libjaylink/.gitignore @@ -0,0 +1,24 @@ +aclocal.m4 +autom4te.cache +build-aux +config.h* +config.log +config.status +configure +configure.gnu +.deps +doxy/ +Doxyfile +INSTALL +*.la +libjaylink.pc +.libs +libtool +*.lo +m4/libtool.m4 +m4/lt*.m4 +Makefile +Makefile.in +*.o +stamp-h1 +version.h diff --git a/src/jtag/drivers/libjaylink/AUTHORS b/src/jtag/drivers/libjaylink/AUTHORS new file mode 100644 index 000000000..507d6e0d6 --- /dev/null +++ b/src/jtag/drivers/libjaylink/AUTHORS @@ -0,0 +1,2 @@ +Please check the source code files and/or Git commit history for a list of all +authors and contributors. diff --git a/src/jtag/drivers/libjaylink/COPYING b/src/jtag/drivers/libjaylink/COPYING new file mode 100644 index 000000000..d159169d1 --- /dev/null +++ b/src/jtag/drivers/libjaylink/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Lesser General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. To prevent this, we have made it clear that any +patent must be licensed for everyone's free use or not licensed at all. + + The precise terms and conditions for copying, distribution and +modification follow. + + GNU GENERAL PUBLIC LICENSE + TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION + + 0. This License applies to any program or other work which contains +a notice placed by the copyright holder saying it may be distributed +under the terms of this General Public License. The "Program", below, +refers to any such program or work, and a "work based on the Program" +means either the Program or any derivative work under copyright law: +that is to say, a work containing the Program or a portion of it, +either verbatim or with modifications and/or translated into another +language. (Hereinafter, translation is included without limitation in +the term "modification".) Each licensee is addressed as "you". + +Activities other than copying, distribution and modification are not +covered by this License; they are outside its scope. The act of +running the Program is not restricted, and the output from the Program +is covered only if its contents constitute a work based on the +Program (independent of having been made by running the Program). +Whether that is true depends on what the Program does. + + 1. You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. 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It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/src/jtag/drivers/libjaylink/ChangeLog b/src/jtag/drivers/libjaylink/ChangeLog new file mode 100644 index 000000000..fade3c9e9 --- /dev/null +++ b/src/jtag/drivers/libjaylink/ChangeLog @@ -0,0 +1 @@ +Please check the Git commit history for a detailed list of changes. diff --git a/src/jtag/drivers/libjaylink/Doxyfile.in b/src/jtag/drivers/libjaylink/Doxyfile.in new file mode 100644 index 000000000..86c546021 --- /dev/null +++ b/src/jtag/drivers/libjaylink/Doxyfile.in @@ -0,0 +1,2301 @@ +# Doxyfile 1.8.6 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project. +# +# All text after a double hash (##) is considered a comment and is placed in +# front of the TAG it is preceding. +# +# All text after a single hash (#) is considered a comment and will be ignored. +# The format is: +# TAG = value [value, ...] +# For lists, items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (\" \"). + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# This tag specifies the encoding used for all characters in the config file +# that follow. The default is UTF-8 which is also the encoding used for all text +# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv +# built into libc) for the transcoding. See http://www.gnu.org/software/libiconv +# for the list of possible encodings. +# The default value is: UTF-8. + +DOXYFILE_ENCODING = UTF-8 + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "libjaylink" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. This +# could be handy for archiving the generated documentation or if some version +# control system is used. + +PROJECT_NUMBER = "@JAYLINK_VERSION_PACKAGE@" + +# Using the PROJECT_BRIEF tag one can provide an optional one line description +# for a project that appears at the top of each page and should give viewer a +# quick idea about the purpose of the project. Keep the description short. + +PROJECT_BRIEF = "Library to access J-Link devices" + +# With the PROJECT_LOGO tag one can specify an logo or icon that is included in +# the documentation. The maximum height of the logo should not exceed 55 pixels +# and the maximum width should not exceed 200 pixels. Doxygen will copy the logo +# to the output directory. + +PROJECT_LOGO = + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path +# into which the generated documentation will be written. If a relative path is +# entered, it will be relative to the location where doxygen was started. If +# left blank the current directory will be used. + +OUTPUT_DIRECTORY = doxy + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create 4096 sub- +# directories (in 2 levels) under the output directory of each output format and +# will distribute the generated files over these directories. Enabling this +# option can be useful when feeding doxygen a huge amount of source files, where +# putting all generated files in the same directory would otherwise causes +# performance problems for the file system. +# The default value is: NO. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, +# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), +# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, +# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), +# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, +# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, +# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, +# Ukrainian and Vietnamese. +# The default value is: English. + +OUTPUT_LANGUAGE = English + +# If the BRIEF_MEMBER_DESC tag is set to YES doxygen will include brief member +# descriptions after the members that are listed in the file and class +# documentation (similar to Javadoc). Set to NO to disable this. +# The default value is: YES. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES doxygen will prepend the brief +# description of a member or function before the detailed description +# +# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. +# The default value is: YES. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator that is +# used to form the text in various listings. Each string in this list, if found +# as the leading text of the brief description, will be stripped from the text +# and the result, after processing the whole list, is used as the annotated +# text. Otherwise, the brief description is used as-is. If left blank, the +# following values are used ($name is automatically replaced with the name of +# the entity):The $name class, The $name widget, The $name file, is, provides, +# specifies, contains, represents, a, an and the. + +ABBREVIATE_BRIEF = + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# doxygen will generate a detailed section even if there is only a brief +# description. +# The default value is: NO. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. +# The default value is: NO. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES doxygen will prepend the full path +# before files name in the file list and in the header files. If set to NO the +# shortest path that makes the file name unique will be used +# The default value is: YES. + +FULL_PATH_NAMES = YES + +# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path. +# Stripping is only done if one of the specified strings matches the left-hand +# part of the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the path to +# strip. +# +# Note that you can specify absolute paths here, but also relative paths, which +# will be relative from the directory where doxygen is started. +# This tag requires that the tag FULL_PATH_NAMES is set to YES. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the +# path mentioned in the documentation of a class, which tells the reader which +# header file to include in order to use a class. If left blank only the name of +# the header file containing the class definition is used. Otherwise one should +# specify the list of include paths that are normally passed to the compiler +# using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but +# less readable) file names. This can be useful is your file systems doesn't +# support long names like on DOS, Mac, or CD-ROM. +# The default value is: NO. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the +# first line (until the first dot) of a Javadoc-style comment as the brief +# description. If set to NO, the Javadoc-style will behave just like regular Qt- +# style comments (thus requiring an explicit @brief command for a brief +# description.) +# The default value is: NO. + +JAVADOC_AUTOBRIEF = YES + +# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first +# line (until the first dot) of a Qt-style comment as the brief description. If +# set to NO, the Qt-style will behave just like regular Qt-style comments (thus +# requiring an explicit \brief command for a brief description.) +# The default value is: NO. + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a +# multi-line C++ special comment block (i.e. a block of //! or /// comments) as +# a brief description. This used to be the default behavior. The new default is +# to treat a multi-line C++ comment block as a detailed description. Set this +# tag to YES if you prefer the old behavior instead. +# +# Note that setting this tag to YES also means that rational rose comments are +# not recognized any more. +# The default value is: NO. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the +# documentation from any documented member that it re-implements. +# The default value is: YES. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce a +# new page for each member. If set to NO, the documentation of a member will be +# part of the file/class/namespace that contains it. +# The default value is: NO. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen +# uses this value to replace tabs by spaces in code fragments. +# Minimum value: 1, maximum value: 16, default value: 4. + +TAB_SIZE = 8 + +# This tag can be used to specify a number of aliases that act as commands in +# the documentation. An alias has the form: +# name=value +# For example adding +# "sideeffect=@par Side Effects:\n" +# will allow you to put the command \sideeffect (or @sideeffect) in the +# documentation, which will result in a user-defined paragraph with heading +# "Side Effects:". You can put \n's in the value part of an alias to insert +# newlines. + +ALIASES = + +# This tag can be used to specify a number of word-keyword mappings (TCL only). +# A mapping has the form "name=value". For example adding "class=itcl::class" +# will allow you to use the command class in the itcl::class meaning. + +TCL_SUBST = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. For +# instance, some of the names that are used will be different. The list of all +# members will be omitted, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_FOR_C = YES + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or +# Python sources only. Doxygen will then generate output that is more tailored +# for that language. For instance, namespaces will be presented as packages, +# qualified scopes will look different, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources. Doxygen will then generate output that is tailored for Fortran. +# The default value is: NO. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for VHDL. +# The default value is: NO. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Doxygen selects the parser to use depending on the extension of the files it +# parses. With this tag you can assign which parser to use for a given +# extension. Doxygen has a built-in mapping, but you can override or extend it +# using this tag. The format is ext=language, where ext is a file extension, and +# language is one of the parsers supported by doxygen: IDL, Java, Javascript, +# C#, C, C++, D, PHP, Objective-C, Python, Fortran, VHDL. For instance to make +# doxygen treat .inc files as Fortran files (default is PHP), and .f files as C +# (default is Fortran), use: inc=Fortran f=C. +# +# Note For files without extension you can use no_extension as a placeholder. +# +# Note that for custom extensions you also need to set FILE_PATTERNS otherwise +# the files are not read by doxygen. + +EXTENSION_MAPPING = + +# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments +# according to the Markdown format, which allows for more readable +# documentation. See http://daringfireball.net/projects/markdown/ for details. +# The output of markdown processing is further processed by doxygen, so you can +# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in +# case of backward compatibilities issues. +# The default value is: YES. + +MARKDOWN_SUPPORT = YES + +# When enabled doxygen tries to link words that correspond to documented +# classes, or namespaces to their corresponding documentation. Such a link can +# be prevented in individual cases by by putting a % sign in front of the word +# or globally by setting AUTOLINK_SUPPORT to NO. +# The default value is: YES. + +AUTOLINK_SUPPORT = YES + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should set this +# tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); +# versus func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. +# The default value is: NO. + +BUILTIN_STL_SUPPORT = NO + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. +# The default value is: NO. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip (see: +# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen +# will parse them like normal C++ but will assume all classes use public instead +# of private inheritance when no explicit protection keyword is present. +# The default value is: NO. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate +# getter and setter methods for a property. Setting this option to YES will make +# doxygen to replace the get and set methods by a property in the documentation. +# This will only work if the methods are indeed getting or setting a simple +# type. If this is not the case, or you want to show the methods anyway, you +# should set this option to NO. +# The default value is: YES. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. +# The default value is: NO. + +DISTRIBUTE_GROUP_DOC = NO + +# Set the SUBGROUPING tag to YES to allow class member groups of the same type +# (for instance a group of public functions) to be put as a subgroup of that +# type (e.g. under the Public Functions section). Set it to NO to prevent +# subgrouping. Alternatively, this can be done per class using the +# \nosubgrouping command. +# The default value is: YES. + +SUBGROUPING = YES + +# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions +# are shown inside the group in which they are included (e.g. using \ingroup) +# instead of on a separate page (for HTML and Man pages) or section (for LaTeX +# and RTF). +# +# Note that this feature does not work in combination with +# SEPARATE_MEMBER_PAGES. +# The default value is: NO. + +INLINE_GROUPED_CLASSES = NO + +# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions +# with only public data fields or simple typedef fields will be shown inline in +# the documentation of the scope in which they are defined (i.e. file, +# namespace, or group documentation), provided this scope is documented. If set +# to NO, structs, classes, and unions are shown on a separate page (for HTML and +# Man pages) or section (for LaTeX and RTF). +# The default value is: NO. + +INLINE_SIMPLE_STRUCTS = NO + +# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or +# enum is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically be +# useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. +# The default value is: NO. + +TYPEDEF_HIDES_STRUCT = NO + +# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This +# cache is used to resolve symbols given their name and scope. Since this can be +# an expensive process and often the same symbol appears multiple times in the +# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small +# doxygen will become slower. If the cache is too large, memory is wasted. The +# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range +# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536 +# symbols. At the end of a run doxygen will report the cache usage and suggest +# the optimal cache size from a speed point of view. +# Minimum value: 0, maximum value: 9, default value: 0. + +LOOKUP_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. Private +# class members and static file members will be hidden unless the +# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. +# Note: This will also disable the warnings about undocumented members that are +# normally produced when WARNINGS is set to YES. +# The default value is: NO. + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class will +# be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_PACKAGE tag is set to YES all members with package or internal +# scope will be included in the documentation. +# The default value is: NO. + +EXTRACT_PACKAGE = NO + +# If the EXTRACT_STATIC tag is set to YES all static members of a file will be +# included in the documentation. +# The default value is: NO. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) defined +# locally in source files will be included in the documentation. If set to NO +# only classes defined in header files are included. Does not have any effect +# for Java sources. +# The default value is: YES. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local methods, +# which are defined in the implementation section but not in the interface are +# included in the documentation. If set to NO only methods in the interface are +# included. +# The default value is: NO. + +EXTRACT_LOCAL_METHODS = NO + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base name of +# the file that contains the anonymous namespace. By default anonymous namespace +# are hidden. +# The default value is: NO. + +EXTRACT_ANON_NSPACES = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all +# undocumented members inside documented classes or files. If set to NO these +# members will be included in the various overviews, but no documentation +# section is generated. This option has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. If set +# to NO these classes will be included in the various overviews. This option has +# no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend +# (class|struct|union) declarations. If set to NO these declarations will be +# included in the documentation. +# The default value is: NO. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any +# documentation blocks found inside the body of a function. If set to NO these +# blocks will be appended to the function's detailed documentation block. +# The default value is: NO. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation that is typed after a +# \internal command is included. If the tag is set to NO then the documentation +# will be excluded. Set it to YES to include the internal documentation. +# The default value is: NO. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file +# names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# and Mac users are advised to set this option to NO. +# The default value is: system dependent. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of +# the files that are included by a file in the documentation of that file. +# The default value is: YES. + +SHOW_INCLUDE_FILES = YES + +# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each +# grouped member an include statement to the documentation, telling the reader +# which file to include in order to use the member. +# The default value is: NO. + +SHOW_GROUPED_MEMB_INC = NO + +# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include +# files with double quotes in the documentation rather than with sharp brackets. +# The default value is: NO. + +FORCE_LOCAL_INCLUDES = NO + +# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the +# documentation for inline members. +# The default value is: YES. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the +# (detailed) documentation of file and class members alphabetically by member +# name. If set to NO the members will appear in declaration order. +# The default value is: YES. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief +# descriptions of file, namespace and class members alphabetically by member +# name. If set to NO the members will appear in declaration order. Note that +# this will also influence the order of the classes in the class list. +# The default value is: NO. + +SORT_BRIEF_DOCS = NO + +# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the +# (brief and detailed) documentation of class members so that constructors and +# destructors are listed first. If set to NO the constructors will appear in the +# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. +# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief +# member documentation. +# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting +# detailed member documentation. +# The default value is: NO. + +SORT_MEMBERS_CTORS_1ST = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy +# of group names into alphabetical order. If set to NO the group names will +# appear in their defined order. +# The default value is: NO. + +SORT_GROUP_NAMES = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by +# fully-qualified names, including namespaces. If set to NO, the class list will +# be sorted only by class name, not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the alphabetical +# list. +# The default value is: NO. + +SORT_BY_SCOPE_NAME = NO + +# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper +# type resolution of all parameters of a function it will reject a match between +# the prototype and the implementation of a member function even if there is +# only one candidate or it is obvious which candidate to choose by doing a +# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still +# accept a match between prototype and implementation in such cases. +# The default value is: NO. + +STRICT_PROTO_MATCHING = NO + +# The GENERATE_TODOLIST tag can be used to enable ( YES) or disable ( NO) the +# todo list. This list is created by putting \todo commands in the +# documentation. +# The default value is: YES. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable ( YES) or disable ( NO) the +# test list. This list is created by putting \test commands in the +# documentation. +# The default value is: YES. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable ( YES) or disable ( NO) the bug +# list. This list is created by putting \bug commands in the documentation. +# The default value is: YES. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable ( YES) or disable ( NO) +# the deprecated list. This list is created by putting \deprecated commands in +# the documentation. +# The default value is: YES. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional documentation +# sections, marked by \if ... \endif and \cond +# ... \endcond blocks. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the +# initial value of a variable or macro / define can have for it to appear in the +# documentation. If the initializer consists of more lines than specified here +# it will be hidden. Use a value of 0 to hide initializers completely. The +# appearance of the value of individual variables and macros / defines can be +# controlled using \showinitializer or \hideinitializer command in the +# documentation regardless of this setting. +# Minimum value: 0, maximum value: 10000, default value: 30. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at +# the bottom of the documentation of classes and structs. If set to YES the list +# will mention the files that were used to generate the documentation. +# The default value is: YES. + +SHOW_USED_FILES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This +# will remove the Files entry from the Quick Index and from the Folder Tree View +# (if specified). +# The default value is: YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces +# page. This will remove the Namespaces entry from the Quick Index and from the +# Folder Tree View (if specified). +# The default value is: YES. + +SHOW_NAMESPACES = YES + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command command input-file, where command is the value of the +# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided +# by doxygen. Whatever the program writes to standard output is used as the file +# version. For an example see the documentation. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed +# by doxygen. The layout file controls the global structure of the generated +# output files in an output format independent way. To create the layout file +# that represents doxygen's defaults, run doxygen with the -l option. You can +# optionally specify a file name after the option, if omitted DoxygenLayout.xml +# will be used as the name of the layout file. +# +# Note that if you run doxygen from a directory containing a file called +# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE +# tag is left empty. + +LAYOUT_FILE = + +# The CITE_BIB_FILES tag can be used to specify one or more bib files containing +# the reference definitions. This must be a list of .bib files. The .bib +# extension is automatically appended if omitted. This requires the bibtex tool +# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info. +# For LaTeX the style of the bibliography can be controlled using +# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the +# search path. Do not use file names with spaces, bibtex cannot handle them. See +# also \cite for info how to create references. + +CITE_BIB_FILES = + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated to +# standard output by doxygen. If QUIET is set to YES this implies that the +# messages are off. +# The default value is: NO. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated to standard error ( stderr) by doxygen. If WARNINGS is set to YES +# this implies that the warnings are on. +# +# Tip: Turn warnings on while writing the documentation. +# The default value is: YES. + +WARNINGS = YES + +# If the WARN_IF_UNDOCUMENTED tag is set to YES, then doxygen will generate +# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: YES. + +WARN_IF_UNDOCUMENTED = YES + +# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some parameters +# in a documented function, or documenting parameters that don't exist or using +# markup commands wrongly. +# The default value is: YES. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that +# are documented, but have no documentation for their parameters or return +# value. If set to NO doxygen will only warn about wrong or incomplete parameter +# documentation, but not about the absence of documentation. +# The default value is: NO. + +WARN_NO_PARAMDOC = NO + +# The WARN_FORMAT tag determines the format of the warning messages that doxygen +# can produce. The string should contain the $file, $line, and $text tags, which +# will be replaced by the file and line number from which the warning originated +# and the warning text. Optionally the format may contain $version, which will +# be replaced by the version of the file (if it could be obtained via +# FILE_VERSION_FILTER) +# The default value is: $file:$line: $text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning and error +# messages should be written. If left blank the output is written to standard +# error (stderr). + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag is used to specify the files and/or directories that contain +# documented source files. You may enter file names like myfile.cpp or +# directories like /usr/src/myproject. Separate the files or directories with +# spaces. +# Note: If this tag is empty the current directory is searched. + +INPUT = @top_srcdir@/libjaylink \ + @top_builddir@/libjaylink/version.h + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses +# libiconv (or the iconv built into libc) for the transcoding. See the libiconv +# documentation (see: http://www.gnu.org/software/libiconv) for the list of +# possible encodings. +# The default value is: UTF-8. + +INPUT_ENCODING = UTF-8 + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank the +# following patterns are tested:*.c, *.cc, *.cxx, *.cpp, *.c++, *.java, *.ii, +# *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, *.hh, *.hxx, *.hpp, +# *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, *.m, *.markdown, +# *.md, *.mm, *.dox, *.py, *.f90, *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf, +# *.qsf, *.as and *.js. + +FILE_PATTERNS = + +# The RECURSIVE tag can be used to specify whether or not subdirectories should +# be searched for input files as well. +# The default value is: NO. + +RECURSIVE = NO + +# The EXCLUDE tag can be used to specify files and/or directories that should be +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. +# +# Note that relative paths are relative to the directory from which doxygen is +# run. + +EXCLUDE = @top_srcdir@/libjaylink/buffer.c \ + @top_srcdir@/libjaylink/discovery_tcp.c \ + @top_srcdir@/libjaylink/discovery_usb.c \ + @top_srcdir@/libjaylink/libjaylink-internal.h \ + @top_srcdir@/libjaylink/list.c \ + @top_srcdir@/libjaylink/socket.c \ + @top_srcdir@/libjaylink/transport.c \ + @top_srcdir@/libjaylink/transport_tcp.c \ + @top_srcdir@/libjaylink/transport_usb.c + +# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or +# directories that are symbolic links (a Unix file system feature) are excluded +# from the input. +# The default value is: NO. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories for example use the pattern */test/* + +EXCLUDE_PATTERNS = + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories use the pattern */test/* + +EXCLUDE_SYMBOLS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or directories +# that contain example code fragments that are included (see the \include +# command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank all +# files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude commands +# irrespective of the value of the RECURSIVE tag. +# The default value is: NO. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or directories +# that contain images that are to be included in the documentation (see the +# \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command: +# +# +# +# where is the value of the INPUT_FILTER tag, and is the +# name of an input file. Doxygen will then use the output that the filter +# program writes to standard output. If FILTER_PATTERNS is specified, this tag +# will be ignored. +# +# Note that the filter must not add or remove lines; it is applied before the +# code is scanned, but not when the output code is generated. If lines are added +# or removed, the anchors will not be placed correctly. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: pattern=filter +# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how +# filters are used. If the FILTER_PATTERNS tag is empty or if none of the +# patterns match the file name, INPUT_FILTER is applied. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER ) will also be used to filter the input files that are used for +# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). +# The default value is: NO. + +FILTER_SOURCE_FILES = NO + +# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file +# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and +# it is also possible to disable source filtering for a specific pattern using +# *.ext= (so without naming a filter). +# This tag requires that the tag FILTER_SOURCE_FILES is set to YES. + +FILTER_SOURCE_PATTERNS = + +# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that +# is part of the input, its contents will be placed on the main page +# (index.html). This can be useful if you have a project on for instance GitHub +# and want to reuse the introduction page also for the doxygen output. + +USE_MDFILE_AS_MAINPAGE = + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will be +# generated. Documented entities will be cross-referenced with these sources. +# +# Note: To get rid of all source code in the generated output, make sure that +# also VERBATIM_HEADERS is set to NO. +# The default value is: NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body of functions, +# classes and enums directly into the documentation. +# The default value is: NO. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any +# special comment blocks from generated source code fragments. Normal C, C++ and +# Fortran comments will always remain visible. +# The default value is: YES. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES then for each documented +# function all documented functions referencing it will be listed. +# The default value is: NO. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES then for each documented function +# all documented entities called/used by that function will be listed. +# The default value is: NO. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set +# to YES, then the hyperlinks from functions in REFERENCES_RELATION and +# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will +# link to the documentation. +# The default value is: YES. + +REFERENCES_LINK_SOURCE = YES + +# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the +# source code will show a tooltip with additional information such as prototype, +# brief description and links to the definition and documentation. Since this +# will make the HTML file larger and loading of large files a bit slower, you +# can opt to disable this feature. +# The default value is: YES. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +SOURCE_TOOLTIPS = YES + +# If the USE_HTAGS tag is set to YES then the references to source code will +# point to the HTML generated by the htags(1) tool instead of doxygen built-in +# source browser. The htags tool is part of GNU's global source tagging system +# (see http://www.gnu.org/software/global/global.html). You will need version +# 4.8.6 or higher. +# +# To use it do the following: +# - Install the latest version of global +# - Enable SOURCE_BROWSER and USE_HTAGS in the config file +# - Make sure the INPUT points to the root of the source tree +# - Run doxygen as normal +# +# Doxygen will invoke htags (and that will in turn invoke gtags), so these +# tools must be available from the command line (i.e. in the search path). +# +# The result: instead of the source browser generated by doxygen, the links to +# source code will now point to the output of htags. +# The default value is: NO. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a +# verbatim copy of the header file for each class for which an include is +# specified. Set to NO to disable this. +# See also: Section \class. +# The default value is: YES. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all +# compounds will be generated. Enable this if the project contains a lot of +# classes, structs, unions or interfaces. +# The default value is: YES. + +ALPHABETICAL_INDEX = YES + +# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in +# which the alphabetical index list will be split. +# Minimum value: 1, maximum value: 20, default value: 5. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all classes will +# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag +# can be used to specify a prefix (or a list of prefixes) that should be ignored +# while generating the index headers. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES doxygen will generate HTML output +# The default value is: YES. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each +# generated HTML page (for example: .htm, .php, .asp). +# The default value is: .html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a user-defined HTML header file for +# each generated HTML page. If the tag is left blank doxygen will generate a +# standard header. +# +# To get valid HTML the header file that includes any scripts and style sheets +# that doxygen needs, which is dependent on the configuration options used (e.g. +# the setting GENERATE_TREEVIEW). It is highly recommended to start with a +# default header using +# doxygen -w html new_header.html new_footer.html new_stylesheet.css +# YourConfigFile +# and then modify the file new_header.html. See also section "Doxygen usage" +# for information on how to generate the default header that doxygen normally +# uses. +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. For a description +# of the possible markers and block names see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each +# generated HTML page. If the tag is left blank doxygen will generate a standard +# footer. See HTML_HEADER for more information on how to generate a default +# footer and what special commands can be used inside the footer. See also +# section "Doxygen usage" for information on how to generate the default footer +# that doxygen normally uses. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style +# sheet that is used by each HTML page. It can be used to fine-tune the look of +# the HTML output. If left blank doxygen will generate a default style sheet. +# See also section "Doxygen usage" for information on how to generate the style +# sheet that doxygen normally uses. +# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as +# it is more robust and this tag (HTML_STYLESHEET) will in the future become +# obsolete. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_STYLESHEET = + +# The HTML_EXTRA_STYLESHEET tag can be used to specify an additional user- +# defined cascading style sheet that is included after the standard style sheets +# created by doxygen. Using this option one can overrule certain style aspects. +# This is preferred over using HTML_STYLESHEET since it does not replace the +# standard style sheet and is therefor more robust against future updates. +# Doxygen will copy the style sheet file to the output directory. For an example +# see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_STYLESHEET = + +# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the HTML output directory. Note +# that these files will be copied to the base HTML output directory. Use the +# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these +# files. In the HTML_STYLESHEET file, use the file name only. Also note that the +# files will be copied as-is; there are no commands or markers available. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_FILES = + +# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen +# will adjust the colors in the stylesheet and background images according to +# this color. Hue is specified as an angle on a colorwheel, see +# http://en.wikipedia.org/wiki/Hue for more information. For instance the value +# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 +# purple, and 360 is red again. +# Minimum value: 0, maximum value: 359, default value: 220. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_HUE = 220 + +# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors +# in the HTML output. For a value of 0 the output will use grayscales only. A +# value of 255 will produce the most vivid colors. +# Minimum value: 0, maximum value: 255, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_SAT = 100 + +# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the +# luminance component of the colors in the HTML output. Values below 100 +# gradually make the output lighter, whereas values above 100 make the output +# darker. The value divided by 100 is the actual gamma applied, so 80 represents +# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not +# change the gamma. +# Minimum value: 40, maximum value: 240, default value: 80. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_GAMMA = 80 + +# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML +# page will contain the date and time when the page was generated. Setting this +# to NO can help when comparing the output of multiple runs. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_TIMESTAMP = YES + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_SECTIONS = NO + +# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries +# shown in the various tree structured indices initially; the user can expand +# and collapse entries dynamically later on. Doxygen will expand the tree to +# such a level that at most the specified number of entries are visible (unless +# a fully collapsed tree already exceeds this amount). So setting the number of +# entries 1 will produce a full collapsed tree by default. 0 is a special value +# representing an infinite number of entries and will result in a full expanded +# tree by default. +# Minimum value: 0, maximum value: 9999, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_INDEX_NUM_ENTRIES = 100 + +# If the GENERATE_DOCSET tag is set to YES, additional index files will be +# generated that can be used as input for Apple's Xcode 3 integrated development +# environment (see: http://developer.apple.com/tools/xcode/), introduced with +# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a +# Makefile in the HTML output directory. Running make will produce the docset in +# that directory and running make install will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at +# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html +# for more information. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_DOCSET = NO + +# This tag determines the name of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# The default value is: Doxygen generated docs. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# This tag specifies a string that should uniquely identify the documentation +# set bundle. This should be a reverse domain-name style string, e.g. +# com.mycompany.MyDocSet. Doxygen will append .docset to the name. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify +# the documentation publisher. This should be a reverse domain-name style +# string, e.g. com.mycompany.MyDocSet.documentation. +# The default value is: org.doxygen.Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_ID = org.doxygen.Publisher + +# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. +# The default value is: Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_NAME = Publisher + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler ( hhc.exe). If non-empty +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = + +# The GENERATE_CHI flag controls if a separate .chi index file is generated ( +# YES) or that it should be included in the master .chm file ( NO). +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +GENERATE_CHI = NO + +# The CHM_INDEX_ENCODING is used to encode HtmlHelp index ( hhk), content ( hhc) +# and project file content. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_INDEX_ENCODING = + +# The BINARY_TOC flag controls whether a binary table of contents is generated ( +# YES) or a normal table of contents ( NO) in the .chm file. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = NO + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and +# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that +# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help +# (.qch) of the generated HTML documentation. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify +# the file name of the resulting .qch file. The path specified is relative to +# the HTML output folder. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help +# Project output. For more information please see Qt Help Project / Namespace +# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace). +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_NAMESPACE = org.doxygen.Project + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt +# Help Project output. For more information please see Qt Help Project / Virtual +# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual- +# folders). +# The default value is: doc. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_VIRTUAL_FOLDER = doc + +# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom +# filter to add. For more information please see Qt Help Project / Custom +# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the +# custom filter to add. For more information please see Qt Help Project / Custom +# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this +# project's filter section matches. Qt Help Project / Filter Attributes (see: +# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_SECT_FILTER_ATTRS = + +# The QHG_LOCATION tag can be used to specify the location of Qt's +# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the +# generated .qhp file. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHG_LOCATION = + +# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be +# generated, together with the HTML files, they form an Eclipse help plugin. To +# install this plugin and make it available under the help contents menu in +# Eclipse, the contents of the directory containing the HTML and XML files needs +# to be copied into the plugins directory of eclipse. The name of the directory +# within the plugins directory should be the same as the ECLIPSE_DOC_ID value. +# After copying Eclipse needs to be restarted before the help appears. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_ECLIPSEHELP = NO + +# A unique identifier for the Eclipse help plugin. When installing the plugin +# the directory name containing the HTML and XML files should also have this +# name. Each documentation set should have its own identifier. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. + +ECLIPSE_DOC_ID = org.doxygen.Project + +# If you want full control over the layout of the generated HTML pages it might +# be necessary to disable the index and replace it with your own. The +# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top +# of each HTML page. A value of NO enables the index and the value YES disables +# it. Since the tabs in the index contain the same information as the navigation +# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +DISABLE_INDEX = NO + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. If the tag +# value is set to YES, a side panel will be generated containing a tree-like +# index structure (just like the one that is generated for HTML Help). For this +# to work a browser that supports JavaScript, DHTML, CSS and frames is required +# (i.e. any modern browser). Windows users are probably better off using the +# HTML help feature. Via custom stylesheets (see HTML_EXTRA_STYLESHEET) one can +# further fine-tune the look of the index. As an example, the default style +# sheet generated by doxygen has an example that shows how to put an image at +# the root of the tree instead of the PROJECT_NAME. Since the tree basically has +# the same information as the tab index, you could consider setting +# DISABLE_INDEX to YES when enabling this option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_TREEVIEW = NO + +# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that +# doxygen will group on one line in the generated HTML documentation. +# +# Note that a value of 0 will completely suppress the enum values from appearing +# in the overview section. +# Minimum value: 0, maximum value: 20, default value: 4. +# This tag requires that the tag GENERATE_HTML is set to YES. + +ENUM_VALUES_PER_LINE = 1 + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used +# to set the initial width (in pixels) of the frame in which the tree is shown. +# Minimum value: 0, maximum value: 1500, default value: 250. +# This tag requires that the tag GENERATE_HTML is set to YES. + +TREEVIEW_WIDTH = 250 + +# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open links to +# external symbols imported via tag files in a separate window. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +EXT_LINKS_IN_WINDOW = NO + +# Use this tag to change the font size of LaTeX formulas included as images in +# the HTML documentation. When you change the font size after a successful +# doxygen run you need to manually remove any form_*.png images from the HTML +# output directory to force them to be regenerated. +# Minimum value: 8, maximum value: 50, default value: 10. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_FONTSIZE = 10 + +# Use the FORMULA_TRANPARENT tag to determine whether or not the images +# generated for formulas are transparent PNGs. Transparent PNGs are not +# supported properly for IE 6.0, but are supported on all modern browsers. +# +# Note that when changing this option you need to delete any form_*.png files in +# the HTML output directory before the changes have effect. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_TRANSPARENT = YES + +# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see +# http://www.mathjax.org) which uses client side Javascript for the rendering +# instead of using prerendered bitmaps. Use this if you do not have LaTeX +# installed or if you want to formulas look prettier in the HTML output. When +# enabled you may also need to install MathJax separately and configure the path +# to it using the MATHJAX_RELPATH option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +USE_MATHJAX = NO + +# When MathJax is enabled you can set the default output format to be used for +# the MathJax output. See the MathJax site (see: +# http://docs.mathjax.org/en/latest/output.html) for more details. +# Possible values are: HTML-CSS (which is slower, but has the best +# compatibility), NativeMML (i.e. MathML) and SVG. +# The default value is: HTML-CSS. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_FORMAT = HTML-CSS + +# When MathJax is enabled you need to specify the location relative to the HTML +# output directory using the MATHJAX_RELPATH option. The destination directory +# should contain the MathJax.js script. For instance, if the mathjax directory +# is located at the same level as the HTML output directory, then +# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax +# Content Delivery Network so you can quickly see the result without installing +# MathJax. However, it is strongly recommended to install a local copy of +# MathJax from http://www.mathjax.org before deployment. +# The default value is: http://cdn.mathjax.org/mathjax/latest. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest + +# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax +# extension names that should be enabled during MathJax rendering. For example +# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_EXTENSIONS = + +# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces +# of code that will be used on startup of the MathJax code. See the MathJax site +# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an +# example see the documentation. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_CODEFILE = + +# When the SEARCHENGINE tag is enabled doxygen will generate a search box for +# the HTML output. The underlying search engine uses javascript and DHTML and +# should work on any modern browser. Note that when using HTML help +# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) +# there is already a search function so this one should typically be disabled. +# For large projects the javascript based search engine can be slow, then +# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to +# search using the keyboard; to jump to the search box use + S +# (what the is depends on the OS and browser, but it is typically +# , /