From 4ad68fb6d6107a5b80918c33961a35fa61aa6d46 Mon Sep 17 00:00:00 2001 From: oharboe Date: Wed, 5 Nov 2008 06:39:33 +0000 Subject: [PATCH] John McCarthy - mips_4k options git-svn-id: svn://svn.berlios.de/openocd/trunk@1133 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- doc/openocd.texi | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/doc/openocd.texi b/doc/openocd.texi index 4fb606293..cae6a6d3a 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -576,11 +576,13 @@ Currently, there are no options available for the ep93xx interface. @item @b{cortex_m3} @item @b{feroceon} @item @b{xscale} +@item @b{arm11} @item @b{mips_m4k} @end itemize If you want to use a target board that is not on this list, see Adding a new -target board +target board. +The @option{target types} command can be used to get the list of targets supported from within openocd. Endianess may be @option{little} or @option{big}. @@ -638,6 +640,16 @@ be detected and the normal reset behaviour used. Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x}, @option{pxa250}, @option{pxa255}, @option{pxa26x}. +@subsection arm11 options +@cindex arm11 options + +@subsection mips_m4k options +@cindex mips_m4k options +Use variant @option{ejtag_srst} when debugging targets that +do not provide a functional SRST line on the EJTAG connector. +This causes openocd to instead use an EJTAG software reset command to reset the processor. +You still need to enable @option{srst} on the reset configuration command to enable openocd hardware reset functionality. + @section Flash configuration @cindex Flash configuration