ARM11: added mrc/mcr support to arm11 code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>__archive__
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cca7cf1e74
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4441c1ffdc
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TODO
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TODO
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@ -143,7 +143,7 @@ Once the above are completed:
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- regression: "reset halt" between 729(works) and 788(fails): @par
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https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
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- mcr/mrc target->type support
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- missing from ARM11, ARM920t, ARM966e, XScale.
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- missing from ARM920t, ARM966e, XScale.
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It's possible that the current syntax is unable to support read-modify-write
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operations(see arm966e).
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- mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
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@ -60,6 +60,10 @@ bool arm11_config_hardware_step = false;
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#define ARM11_HANDLER(x) \
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.x = arm11_##x
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static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
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static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
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target_type_t arm11_target =
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{
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.name = "arm11",
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@ -97,6 +101,9 @@ target_type_t arm11_target =
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ARM11_HANDLER(target_create),
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ARM11_HANDLER(init_target),
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ARM11_HANDLER(examine),
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.mrc = arm11_mrc,
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.mcr = arm11_mcr,
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};
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int arm11_regs_arch_type = -1;
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@ -2191,6 +2198,52 @@ int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args,
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return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false);
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}
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static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read)
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{
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int retval;
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arm11_common_t * arm11 = target->arch_info;
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uint32_t instr = 0xEE000010 |
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(cpnum << 8) |
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(op1 << 21) |
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(CRn << 16) |
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(CRm << 0) |
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(op2 << 5);
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if (read)
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instr |= 0x00100000;
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retval = arm11_run_instr_data_prepare(arm11);
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if (retval != ERROR_OK)
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return retval;
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if (read)
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{
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retval = arm11_run_instr_data_from_core_via_r0(arm11, instr, value);
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if (retval != ERROR_OK)
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return retval;
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}
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else
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{
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retval = arm11_run_instr_data_to_core_via_r0(arm11, instr, *value);
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if (retval != ERROR_OK)
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return retval;
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}
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return arm11_run_instr_data_finish(arm11);
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}
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static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
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{
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return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, value, true);
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}
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static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
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{
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return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
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}
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int arm11_register_commands(struct command_context_s *cmd_ctx)
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{
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FNC_INFO;
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