diff --git a/contrib/99-openocd.rules b/contrib/99-openocd.rules
index acdfade2f..d810fcaf2 100644
--- a/contrib/99-openocd.rules
+++ b/contrib/99-openocd.rules
@@ -50,6 +50,9 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="664", GROUP="plugdev"
 # Amontec JTAGkey and JTAGkey-tiny
 ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev"
 
+# TI ICDI
+ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="664", GROUP="plugdev"
+
 # STLink v1
 ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="664", GROUP="plugdev"
 
diff --git a/tcl/board/ti-cc3200-launchxl.cfg b/tcl/board/ti-cc3200-launchxl.cfg
new file mode 100644
index 000000000..fd80c5310
--- /dev/null
+++ b/tcl/board/ti-cc3200-launchxl.cfg
@@ -0,0 +1,18 @@
+#
+# TI SimpleLink Wi-Fi CC3200 LaunchPad
+#
+# http://www.ti.com/tool/cc3200-launchxl
+#
+
+source [find interface/ftdi/ti-icdi.cfg]
+
+if { [info exists TRANSPORT] } {
+   transport select $TRANSPORT
+} else {
+   transport select jtag
+}
+
+set WORKAREASIZE 0x40000
+source [find target/cc32xx.cfg]
+
+reset_config srst_only
diff --git a/tcl/interface/ftdi/ti-icdi.cfg b/tcl/interface/ftdi/ti-icdi.cfg
new file mode 100644
index 000000000..6af809cd9
--- /dev/null
+++ b/tcl/interface/ftdi/ti-icdi.cfg
@@ -0,0 +1,15 @@
+#
+# This is an FTDI-based debugging solution as found on some TI boards,
+# e.g. CC3200 LaunchPad.
+#
+# The schematics are identical to luminary-icdi (including SWD
+# support) but the USB IDs are different.
+#
+
+interface ftdi
+ftdi_vid_pid 0x0451 0xc32a
+
+ftdi_layout_init 0x00a8 0x00eb
+ftdi_layout_signal nSRST -noe 0x0020
+ftdi_layout_signal SWD_EN -ndata 0x0080
+ftdi_layout_signal SWDIO_OE -data 0x0008
diff --git a/tcl/target/cc32xx.cfg b/tcl/target/cc32xx.cfg
new file mode 100755
index 000000000..ff6545024
--- /dev/null
+++ b/tcl/target/cc32xx.cfg
@@ -0,0 +1,53 @@
+# Config for Texas Instruments SoC CC32xx family
+
+source [find target/swj-dp.tcl]
+
+adapter_khz 100
+
+source [find target/icepick.cfg]
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME cc32xx
+}
+
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+   set _DAP_TAPID $DAP_TAPID
+} else {
+   if {[using_jtag]} {
+      set _DAP_TAPID 0x4BA00477
+   } else {
+      set _DAP_TAPID 0x2BA01477
+   }
+}
+
+if {[using_jtag]} {
+   jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
+   jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
+} else {
+   swj_newdap $_CHIPNAME dap -expected-id $_DAP_TAPID
+}
+
+#
+# ICEpick-C (JTAG route controller)
+#
+if { [info exists JRC_TAPID] } {
+   set _JRC_TAPID $JRC_TAPID
+} else {
+   set _JRC_TAPID 0x0B97C02F
+}
+
+if {[using_jtag]} {
+   jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
+   jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
+}
+
+#
+# Cortex M3 target
+#
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap