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target: cortex_a: do not create new register cache every reset 

Commit 68101e67ac introduced a
regression which resulted for ever-growing registers list (as output
by "reg" command), its contents were doubled every reset (actually,
every examination).

Change-Id: Ie3409c795160a2fc840a5e8a892928df0bcc0c57
Reported-by: Daniele Emancipato <daniele12457@hotmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3100
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
__archive__
Paul Fertser 2015-11-06 20:26:46 +03:00 committed by Freddie Chopin
parent 987201c6dc
commit 408213f554
1 changed files with 7 additions and 3 deletions
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4
src/target/cortex_a.c
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@ -2996,9 +2996,13 @@ static int cortex_a_examine_first(struct target *target)
LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR 0x%" PRIx32, target->coreid, dbg_osreg); LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR 0x%" PRIx32, target->coreid, dbg_osreg);
armv7a->arm.core_type = ARM_MODE_MON; armv7a->arm.core_type = ARM_MODE_MON;
/* Avoid recreating the registers cache */
if (!target_was_examined(target)) {
retval = cortex_a_dpm_setup(cortex_a, didr); retval = cortex_a_dpm_setup(cortex_a, didr);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
}
/* Setup Breakpoint Register Pairs */ /* Setup Breakpoint Register Pairs */
cortex_a->brp_num = ((didr >> 24) & 0x0F) + 1; cortex_a->brp_num = ((didr >> 24) & 0x0F) + 1;