wip
git-svn-id: svn://svn.berlios.de/openocd/trunk@1136 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
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# iMote2
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#
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# PXA271 and an Intel Strataflash of 32 Megabytes (p30)
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#
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# Marvell/Intel PXA270 Script
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# set jtag_nsrst_delay to the delay introduced by your reset circuit
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# the rest of the needed delays are built into the openocd program
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jtag_nsrst_delay 800
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# set the jtag_ntrst_delay to the delay introduced by a reset circuit
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# the rest of the needed delays are built into the openocd program
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jtag_ntrst_delay 0
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#use combined on interfaces or targets that can’t set TRST/SRST separately
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reset_config trst_and_srst separate
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 7 0x1 0x7f 0x7e
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target xscale little 0 pxa27x
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# maps to PXA internal RAM. If you are using a PXA255
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# you must initialize SDRAM or leave this option off
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working_area 0 0x5c000000 0x10000 nobackup
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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# works for P30 flash
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flash bank cfi 0x00000000 0x2000000 2 2 0
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# script for Insilica IS-5114
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# jtag speed. We need to stick to 16kHz until we've finished reset.
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jtag_rclk 16
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reset_config trst_and_srst
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jtag_device 8 0x1 0x1 0xfe
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jtag_device 4 0x1 0xf 0xe
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jtag_device 5 0x1 0x1 0x1e
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#arm946e-s and
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target arm966e little 1 arm966e
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[new_target_name] configure -event reset-start { jtag_rclk 16 }
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[new_target_name] configure -event reset-init {
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# We can increase speed now that we know the target is halted.
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jtag_rclk 3000
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}
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working_area 0 0x50000000 16384 nobackup
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# str910-eval eval board
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#
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# Need reset scripts
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reset_config trst_and_srst
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jtag_device 8 0x1 0x1 0xfe
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jtag_device 4 0x1 0xf 0xe
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jtag_device 5 0x1 0x1 0x1e
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target arm966e little reset_halt 1 arm966e
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working_area 0 0x50000000 16384 nobackup
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flash bank str9xpec 0x00000000 0x00080000 0 0 0
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str9xpec enable_turbo 0
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str9xpec options_read 0
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str9xpec options_cmap 0 bank 1
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str9xpec options_write 0
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