parent
c4a1728a2d
commit
355f183adb
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@ -582,11 +582,11 @@ static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_statu
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instr = MASTER_TAP_CMD_IDCODE;
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retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_MASTER_TAP_IRLEN);
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err_check_propagate(retval);
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usleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*100*1000);
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// Enable EOnCE module
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jtag_add_reset(0,1);
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usleep(TIME_DIV_FREESCALE*200*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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instr = 0x0606ffff;// This was selected experimentally.
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr,(uint8_t *) & ir_out,32);
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err_check_propagate(retval);
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@ -608,9 +608,9 @@ static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_statu
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,8);
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instr_16 = 0x20;
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,8);
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usleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_reset(0,0);
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usleep(TIME_DIV_FREESCALE*300*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*300*1000);
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instr = JTAG_INSTR_ENABLE_ONCE;
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//Two rounds of jtag 0x6 (enable eonce) to enable EOnCE.
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@ -1640,11 +1640,11 @@ int dsp5680xx_f_unlock(struct target * target){
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}
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jtag_add_reset(0,1);
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usleep(TIME_DIV_FREESCALE*200*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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retval = reset_jtag();
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err_check(retval,"Failed to reset JTAG state machine");
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usleep(150);
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jtag_add_sleep(150);
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// Enable core tap
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tap_chp->enabled = true;
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@ -1654,9 +1654,9 @@ int dsp5680xx_f_unlock(struct target * target){
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instr = JTAG_INSTR_DEBUG_REQUEST;
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retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
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err_check_propagate(retval);
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usleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_reset(0,0);
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usleep(TIME_DIV_FREESCALE*300*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*300*1000);
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// Enable master tap
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tap_chp->enabled = false;
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@ -1672,13 +1672,13 @@ int dsp5680xx_f_unlock(struct target * target){
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr,(uint8_t *) & ir_out,16);
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err_check_propagate(retval);
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usleep(TIME_DIV_FREESCALE*150*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*150*1000);
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jtag_add_reset(0,1);
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usleep(TIME_DIV_FREESCALE*200*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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retval = reset_jtag();
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err_check(retval,"Failed to reset JTAG state machine");
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usleep(150);
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jtag_add_sleep(150);
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instr = 0x0606ffff;
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr,(uint8_t *) & ir_out,32);
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@ -1706,9 +1706,9 @@ int dsp5680xx_f_unlock(struct target * target){
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,8);
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instr_16 = 0x20;
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retval = dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,8);
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usleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_reset(0,0);
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usleep(TIME_DIV_FREESCALE*300*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*300*1000);
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return retval;
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}
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@ -1719,13 +1719,13 @@ int dsp5680xx_f_lock(struct target * target){
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err_check_propagate(retval);
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jtag_add_reset(0,1);
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usleep(TIME_DIV_FREESCALE*200*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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retval = reset_jtag();
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err_check(retval,"Failed to reset JTAG state machine");
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usleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_reset(0,0);
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usleep(TIME_DIV_FREESCALE*300*1000);
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jtag_add_sleep(TIME_DIV_FREESCALE*300*1000);
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return retval;
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}
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