Support for SST 39VF3201C NOR flash
* Add Thumb-2 code to write flash memories that don't support DQ5 polling * Make sure default values for unlock commands are set even if there is no PRI information given by the flash * Add a fixup to disable DQ5 polling for the SST 39VF3201C Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40 Signed-off-by: IS2T development team <dev.is2t@gmail.com> Reviewed-on: http://openocd.zylin.com/1449 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
IS2T
Spencer Oliver
parent
434afb370f
commit
34e8d1a50d
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@ -0,0 +1,72 @@
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2010 Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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.text
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.syntax unified
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.arch armv7-m
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.thumb
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.thumb_func
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.align 2
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/* input parameters - */
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/* R0 = source address */
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/* R1 = destination address */
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/* R2 = number of writes */
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/* R3 = flash write command */
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/* R4 = constant to mask DQ7 bits */
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/* output parameters - */
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/* R5 = 0x80 ok 0x00 bad */
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/* temp registers - */
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/* R6 = value read from flash to test status */
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/* R7 = holding register */
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/* unlock registers - */
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/* R8 = unlock1_addr */
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/* R9 = unlock1_cmd */
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/* R10 = unlock2_addr */
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/* R11 = unlock2_cmd */
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code:
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ldrh r5, [r0], #2
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strh r9, [r8]
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strh r11, [r10]
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strh r3, [r8]
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strh r5, [r1]
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nop
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busy:
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ldrh r6, [r1]
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eor r7, r5, r6
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ands r7, r4, r7
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bne busy
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subs r2, r2, #1 /* 0x1 */
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beq success
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add r1, r1, #2 /* 0x2 */
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b code
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success:
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mov r5, #128 /* 0x80 */
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b done
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done:
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bkpt #0
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.end
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@ -46,16 +46,19 @@
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#define AT49BV6416 0x00d6
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#define AT49BV6416T 0x00d2
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static struct cfi_unlock_addresses cfi_unlock_addresses[] = {
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static const struct cfi_unlock_addresses cfi_unlock_addresses[] = {
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[CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa },
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[CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa },
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};
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static const int cfi_status_poll_mask_dq6_dq7 = CFI_STATUS_POLL_MASK_DQ6_DQ7;
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/* CFI fixups forward declarations */
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static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param);
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static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param);
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static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *param);
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static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, void *param);
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static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param);
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static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void *param);
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static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void *param);
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static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, const void *param);
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static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param);
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/* fixup after reading cmdset 0002 primary query table */
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static const struct cfi_fixup cfi_0002_fixups[] = {
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@ -71,6 +74,8 @@ static const struct cfi_fixup cfi_0002_fixups[] = {
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&cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
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{CFI_MFR_SST, 0x274b, cfi_fixup_0002_unlock_addresses,
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&cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
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{CFI_MFR_SST, 0x235f, cfi_fixup_0002_polling_bits, /* 39VF3201C */
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&cfi_status_poll_mask_dq6_dq7},
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{CFI_MFR_SST, 0x236d, cfi_fixup_0002_unlock_addresses,
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&cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
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{CFI_MFR_ATMEL, 0x00C8, cfi_fixup_reversed_erase_regions, NULL},
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@ -522,6 +527,11 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
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if (retval != ERROR_OK)
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return retval;
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/* default values for implementation specific workarounds */
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pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
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pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2;
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pri_ext->_reversed_geometry = 0;
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if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) {
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retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
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if (retval != ERROR_OK)
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@ -590,11 +600,6 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
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LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom);
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/* default values for implementation specific workarounds */
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pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
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pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2;
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pri_ext->_reversed_geometry = 0;
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return ERROR_OK;
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}
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@ -1695,7 +1700,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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0xeafffffe /* b 81ac <sp_16_done> */
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};
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/* see contib/loaders/flash/armv7m_cfi_span_16.s for src */
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/* see contrib/loaders/flash/armv7m_cfi_span_16.s for src */
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static const uint32_t armv7m_word_16_code[] = {
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0x5B02F830,
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0x9000F8A8,
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@ -1717,7 +1722,36 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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0x0000BE00
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};
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/* see contib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */
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/* see contrib/loaders/flash/armv7m_cfi_span_16_dq7.s for src */
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static const uint32_t armv7m_word_16_code_dq7only[] = {
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/* 00000000 <code>: */
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0x5B02F830, /* ldrh.w r5, [r0], #2 */
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0x9000F8A8, /* strh.w r9, [r8] */
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0xB000F8AA, /* strh.w fp, [sl] */
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0x3000F8A8, /* strh.w r3, [r8] */
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0xBF00800D, /* strh r5, [r1, #0] */
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/* nop */
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/* 00000014 <busy>: */
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0xEA85880E, /* ldrh r6, [r1, #0] */
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/* eor.w r7, r5, r6 */
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0x40270706, /* ands r7, r4 */
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0x3A01D1FA, /* bne.n 14 <busy> */
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/* subs r2, #1 */
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0xF101D002, /* beq.n 28 <success> */
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0xE7EB0102, /* add.w r1, r1, #2 */
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/* b.n 0 <code> */
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/* 00000028 <success>: */
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0x0580F04F, /* mov.w r5, #128 */
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0xBF00E7FF, /* b.n 30 <done> */
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/* nop (for alignment purposes) */
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/* 00000030 <done>: */
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0x0000BE00 /* bkpt 0x0000 */
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};
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/* see contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */
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static const uint32_t armv4_5_word_16_code_dq7only[] = {
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/* <sp_16_code>: */
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0xe0d050b2, /* ldrh r5, [r0], #2 */
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@ -1741,7 +1775,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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0xeafffffe /* b 81ac <sp_16_done> */
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};
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/* see contib/loaders/flash/armv4_5_cfi_span_8.s for src */
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/* see contrib/loaders/flash/armv4_5_cfi_span_8.s for src */
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static const uint32_t armv4_5_word_8_code[] = {
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/* 000081b0 <sp_16_code_end>: */
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0xe4d05001, /* ldrb r5, [r0], #1 */
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@ -1817,11 +1851,13 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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} else {
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/* No DQ5 support. Use DQ7 DATA# polling only. */
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if (is_armv7m(target_to_armv7m(target))) {
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LOG_ERROR("Unknown ARM architecture");
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return ERROR_FAIL;
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/* armv7m target */
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target_code_src = armv7m_word_16_code_dq7only;
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target_code_size = sizeof(armv7m_word_16_code_dq7only);
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} else { /* armv4_5 target */
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target_code_src = armv4_5_word_16_code_dq7only;
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target_code_size = sizeof(armv4_5_word_16_code_dq7only);
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}
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target_code_src = armv4_5_word_16_code_dq7only;
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target_code_size = sizeof(armv4_5_word_16_code_dq7only);
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}
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break;
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case 4:
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@ -2427,7 +2463,7 @@ static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
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return cfi_reset(bank);
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}
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static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *param)
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static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void *param)
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{
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(void) param;
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struct cfi_flash_bank *cfi_info = bank->driver_priv;
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@ -2436,7 +2472,7 @@ static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, void *para
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pri_ext->_reversed_geometry = 1;
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}
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static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param)
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static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param)
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{
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int i;
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struct cfi_flash_bank *cfi_info = bank->driver_priv;
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@ -2457,16 +2493,24 @@ static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, void *param)
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}
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}
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static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param)
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static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void *param)
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{
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struct cfi_flash_bank *cfi_info = bank->driver_priv;
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struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
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struct cfi_unlock_addresses *unlock_addresses = param;
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const struct cfi_unlock_addresses *unlock_addresses = param;
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pri_ext->_unlock1 = unlock_addresses->unlock1;
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pri_ext->_unlock2 = unlock_addresses->unlock2;
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}
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static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param)
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{
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struct cfi_flash_bank *cfi_info = bank->driver_priv;
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const int status_poll_mask = *(const int *)param;
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cfi_info->status_poll_mask = status_poll_mask;
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}
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static int cfi_query_string(struct flash_bank *bank, int address)
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{
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@ -3028,7 +3072,7 @@ static int get_cfi_info(struct flash_bank *bank, char *buf, int buf_size)
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return ERROR_OK;
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}
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static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, void *param)
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static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, const void *param)
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{
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struct cfi_flash_bank *cfi_info = bank->driver_priv;
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@ -143,8 +143,8 @@ struct cfi_unlock_addresses {
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struct cfi_fixup {
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uint16_t mfr;
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uint16_t id;
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void (*fixup)(struct flash_bank *bank, void *param);
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void *param;
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void (*fixup)(struct flash_bank *bank, const void *param);
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const void *param;
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};
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#define CFI_MFR_AMD 0x0001
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