commit
325f17f6ec
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@ -1223,7 +1223,7 @@ static int read_memory(struct target *target, uint32_t address,
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{
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RISCV013_INFO(info);
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LOG_DEBUG("writing %d words of %d bytes to 0x%08lx", count, size, (long)address);
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LOG_DEBUG("reading %d words of %d bytes from 0x%08lx", count, size, (long)address);
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select_dmi(target);
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riscv_set_current_hartid(target, 0);
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@ -1265,9 +1265,9 @@ static int read_memory(struct target *target, uint32_t address,
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* program execution mechanism. */
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switch (riscv_xlen(target)) {
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case 64:
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riscv_program_write_ram(&program, r_addr + 4, ((riscv_addr_t)(address - size)) >> 32);
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riscv_program_write_ram(&program, r_addr + 4, (((riscv_addr_t) address) - size) >> 32);
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case 32:
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riscv_program_write_ram(&program, r_addr, (riscv_addr_t)(address - size));
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riscv_program_write_ram(&program, r_addr, ((riscv_addr_t) address) - size);
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break;
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default:
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LOG_ERROR("unknown XLEN %d", riscv_xlen(target));
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@ -1318,7 +1318,7 @@ static int read_memory(struct target *target, uint32_t address,
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* the data was all copied. */
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riscv_addr_t cur_addr = 0xbadbeef;
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riscv_addr_t fin_addr = address + (count * size);
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riscv_addr_t prev_addr = 0;
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riscv_addr_t prev_addr = ((riscv_addr_t) address) - size;
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LOG_DEBUG("writing until final address 0x%016lx", fin_addr);
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while (count > 1 && (cur_addr = riscv_read_debug_buffer_x(target, d_addr)) < fin_addr) {
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LOG_DEBUG("transferring burst starting at address 0x%016lx (previous burst was 0x%016lx)", cur_addr, prev_addr);
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