contrib: enable cortex-m0 and cortex-m4 libdcc support

Change-Id: Ib8ff645d1e5b8baca02de8ea95b629d88b203969
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/644
Tested-by: jenkins
__archive__
Spencer Oliver 2012-05-15 13:36:11 +01:00
parent 8cb0dae823
commit 323aeaf90b
1 changed files with 2 additions and 2 deletions

View File

@ -29,9 +29,9 @@
#define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8)) #define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8))
#define TARGET_REQ_DEBUGCHAR 0x02 #define TARGET_REQ_DEBUGCHAR 0x02
#if defined(__ARM_ARCH_7M__) #if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__)
/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel /* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel
* DCRDR[7:0] is used by target for status * DCRDR[7:0] is used by target for status
* DCRDR[15:8] is used by target for write buffer * DCRDR[15:8] is used by target for write buffer
* DCRDR[23:16] is used for by host for status * DCRDR[23:16] is used for by host for status