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tinyriscv-openocd
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- convert spaces to tabs in at91sam7.[ch] 

- add missing svn props

git-svn-id: svn://svn.berlios.de/openocd/trunk@1009 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
ntfreak 2008-09-27 13:00:01 +00:00
parent c90c48b00b
commit 279affdb98
10 changed files with 5400 additions and 5411 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/flash/at91sam7.c
View File

@ -85,7 +85,6 @@ flash_driver_t at91sam7_flash =
.info = at91sam7_info .info = at91sam7_info
}; };
u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 }; u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 }; u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 }; u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
@ -181,7 +180,7 @@ void at91sam7_read_clock_info(flash_bank_t *bank)
at91sam7_info->mck_valid = 1; at91sam7_info->mck_valid = 1;
mainfreq = RC_FREQ / 16ul * (mcfr & 0xffff); mainfreq = RC_FREQ / 16ul * (mcfr & 0xffff);
/* Integer arithmetic should have sufficient precision /* Integer arithmetic should have sufficient precision
as long as PLL is properly configured. */ * as long as PLL is properly configured. */
tmp = mainfreq / (pllr & CKGR_PLLR_DIV)* tmp = mainfreq / (pllr & CKGR_PLLR_DIV)*
(((pllr & CKGR_PLLR_MUL) >> 16) + 1); (((pllr & CKGR_PLLR_MUL) >> 16) + 1);
} }
@ -320,7 +319,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
u16 bnk, sec; u16 bnk, sec;
u16 arch; u16 arch;
u32 cidr, status; u32 cidr;
u8 banks_num; u8 banks_num;
u16 num_nvmbits; u16 num_nvmbits;
u16 sectors_num; u16 sectors_num;
@ -629,8 +628,6 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
int at91sam7_erase_check(struct flash_bank_s *bank) int at91sam7_erase_check(struct flash_bank_s *bank)
{ {
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target; target_t *target = bank->target;
u16 retval; u16 retval;
u32 blank; u32 blank;
@ -675,7 +672,6 @@ int at91sam7_erase_check(struct flash_bank_s *bank)
buffer = malloc(bank->sectors[0].size); buffer = malloc(bank->sectors[0].size);
for (nSector=0; nSector<bank->num_sectors; nSector++) for (nSector=0; nSector<bank->num_sectors; nSector++)
{ {
bank->sectors[nSector].is_erased = 1; bank->sectors[nSector].is_erased = 1;
retval = target->type->read_memory(target, bank->base+bank->sectors[nSector].offset, 4, retval = target->type->read_memory(target, bank->base+bank->sectors[nSector].offset, 4,
bank->sectors[nSector].size/4, buffer); bank->sectors[nSector].size/4, buffer);
@ -971,7 +967,7 @@ int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
cmd = CLB; cmd = CLB;
/* if we lock a page from one sector then entire sector will be locked, also, /* if we lock a page from one sector then entire sector will be locked, also,
if we unlock a page from a locked sector, entire sector will be unlocked */ * if we unlock a page from a locked sector, entire sector will be unlocked */
pagen = sector * at91sam7_info->pages_per_sector; pagen = sector * at91sam7_info->pages_per_sector;
if (at91sam7_flash_command(bank, cmd, pagen) != ERROR_OK) if (at91sam7_flash_command(bank, cmd, pagen) != ERROR_OK)
@ -1053,9 +1049,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
int at91sam7_probe(struct flash_bank_s *bank) int at91sam7_probe(struct flash_bank_s *bank)
{ {
/* we can't probe on an at91sam7 /* we can't probe on an at91sam7
* if this is an at91sam7, it has the configured flash * if this is an at91sam7, it has the configured flash */
*/
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int retval; int retval;
if (bank->target->state != TARGET_HALTED) if (bank->target->state != TARGET_HALTED)

5
src/flash/at91sam7.h
View File

@ -26,7 +26,6 @@
#include "flash.h" #include "flash.h"
#include "target.h" #include "target.h"
typedef struct at91sam7_flash_bank_s typedef struct at91sam7_flash_bank_s
{ {
/* chip id register */ /* chip id register */
@ -58,8 +57,8 @@ typedef struct at91sam7_flash_bank_s
u8 securitybit; u8 securitybit;
/* 0: not init /* 0: not init
1: fmcn for nvbits (1uS) * 1: fmcn for nvbits (1uS)
2: fmcn for flash (1.5uS) */ * 2: fmcn for flash (1.5uS) */
u8 flashmode; u8 flashmode;
/* main clock status */ /* main clock status */

2
src/flash/flash.c
View File

@ -97,8 +97,6 @@ flash_driver_t *flash_drivers[] = {
NULL, NULL,
}; };
flash_bank_t *flash_banks; flash_bank_t *flash_banks;
static command_t *flash_cmd; static command_t *flash_cmd;

10
src/target/cortex_m3.c
View File

@ -563,11 +563,9 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
if (debug_execution) if (debug_execution)
{ {
/* Disable interrupts */ /* Disable interrupts */
/* /* We disable interrupts in the PRIMASK register instead of masking with C_MASKINTS,
We disable interrupts in the PRIMASK register instead of masking with C_MASKINTS, * This is probably the same inssue as Cortex-M3 Errata 377493:
This is probably the same inssue as Cortex-M3 Errata 377493: * C_MASKINTS in parallel with disabled interrupts can cause local faults to not be taken. */
C_MASKINTS in parallel with disabled interrupts can cause local faults to not be taken.
*/
buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_PRIMASK].value, 0, 32, 1); buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_PRIMASK].value, 0, 32, 1);
/* Make sure we are in Thumb mode */ /* Make sure we are in Thumb mode */
buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32, buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32,
@ -765,7 +763,7 @@ int cortex_m3_assert_reset(target_t *target)
{ {
/* I do not know why this is necessary, but it fixes strange effects /* I do not know why this is necessary, but it fixes strange effects
(step/resume cause a NMI after reset) on LM3S6918 -- Michael Schwingen */ * (step/resume cause a NMI after reset) on LM3S6918 -- Michael Schwingen */
u32 tmp; u32 tmp;
ahbap_read_system_atomic_u32(swjdp, NVIC_AIRCR, &tmp ); ahbap_read_system_atomic_u32(swjdp, NVIC_AIRCR, &tmp );
} }