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nds32: support multi-target debugging 

Change-Id: If767f646b234dbcdb01946e5d13a3a6a29df2d78
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1581
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
__archive__
Hsiangkai Wang 2013-07-02 17:29:46 +08:00 committed by Spencer Oliver
parent 18c40eb9e5
commit 24dd226e89
12 changed files with 835 additions and 758 deletions
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83
src/jtag/aice/aice_interface.c
View File

@ -50,24 +50,28 @@ static int aice_khz_to_speed_map[AICE_KHZ_TO_SPEED_MAP_SIZE] = {
375,
};
static struct aice_port_s aice;
static const struct aice_port *aice_port;
static struct aice_port_param_s param;
static uint32_t retry_times;
static uint32_t count_to_check_dbger;
/***************************************************************************/
/* External interface implementation */
#define AICE_MAX_TARGET_ID_CODES 0x10
static uint32_t aice_target_id_codes[AICE_MAX_TARGET_ID_CODES];
static uint32_t aice_target_id_codes[AICE_MAX_NUM_CORE];
static uint8_t aice_num_of_target_id_codes;
/***************************************************************************/
/* AICE operations */
int aice_init_target(struct target *t)
int aice_init_targets(void)
{
int res;
struct target *target;
struct aice_port_s *aice;
LOG_DEBUG("aice_init_target");
LOG_DEBUG("aice_init_targets");
if (aice_num_of_target_id_codes == 0) {
res = aice.port->api->idcode(aice_target_id_codes, &aice_num_of_target_id_codes);
res = aice_port->api->idcode(aice_target_id_codes, &aice_num_of_target_id_codes);
if (res != ERROR_OK) {
LOG_ERROR("<-- TARGET ERROR! Failed to identify AndesCore "
"JTAG Manufacture ID in the JTAG scan chain. "
@ -76,16 +80,17 @@ int aice_init_target(struct target *t)
}
}
t->tap->idcode = aice_target_id_codes[t->tap->abs_chain_position];
for (target = all_targets; target; target = target->next) {
target->tap->idcode = aice_target_id_codes[target->tap->abs_chain_position];
unsigned ii, limit = t->tap->expected_ids_cnt;
unsigned ii, limit = target->tap->expected_ids_cnt;
int found = 0;
for (ii = 0; ii < limit; ii++) {
uint32_t expected = t->tap->expected_ids[ii];
uint32_t expected = target->tap->expected_ids[ii];
/* treat "-expected-id 0" as a "don't-warn" wildcard */
if (!expected || (t->tap->idcode == expected)) {
if (!expected || (target->tap->idcode == expected)) {
found = 1;
break;
}
@ -93,13 +98,18 @@ int aice_init_target(struct target *t)
if (found == 0) {
LOG_ERROR
("aice_init_target: target not found: idcode: %x ",
t->tap->idcode);
("aice_init_targets: target not found: idcode: %x ",
target->tap->idcode);
return ERROR_FAIL;
}
t->tap->priv = &aice;
t->tap->hasidcode = 1;
aice = calloc(1, sizeof(struct aice_port_s));
aice->port = aice_port;
aice->coreid = target->tap->abs_chain_position;
target->tap->priv = aice;
target->tap->hasidcode = 1;
}
return ERROR_OK;
}
@ -114,14 +124,14 @@ int aice_init_target(struct target *t)
*/
static int aice_init(void)
{
if (ERROR_OK != aice.port->api->open(&(aice.param))) {
if (ERROR_OK != aice_port->api->open(&param)) {
LOG_ERROR("Cannot find AICE Interface! Please check "
"connection and permissions.");
return ERROR_JTAG_INIT_FAILED;
}
aice.port->api->set_retry_times(aice.retry_times);
aice.port->api->set_count_to_check_dbger(aice.count_to_check_dbger);
aice_port->api->set_retry_times(retry_times);
aice_port->api->set_count_to_check_dbger(count_to_check_dbger);
LOG_INFO("AICE JTAG Interface ready");
@ -133,7 +143,7 @@ static int aice_init(void)
*/
static int aice_quit(void)
{
aice.port->api->close();
aice_port->api->close();
return ERROR_OK;
}
@ -146,7 +156,7 @@ static int aice_execute_reset(struct jtag_command *cmd)
if (cmd->cmd.reset->trst != last_trst) {
if (cmd->cmd.reset->trst)
retval = aice.port->api->reset();
retval = aice_port->api->reset();
last_trst = cmd->cmd.reset->trst;
}
@ -191,7 +201,7 @@ static int aice_execute_queue(void)
/* set jtag frequency(base frequency/frequency divider) to your jtag adapter */
static int aice_speed(int speed)
{
return aice.port->api->set_jtag_clock(speed);
return aice_port->api->set_jtag_clock(speed);
}
/* convert jtag adapter frequency(base frequency/frequency divider) to
@ -237,10 +247,10 @@ COMMAND_HANDLER(aice_handle_aice_info_command)
{
LOG_DEBUG("aice_handle_aice_info_command");
command_print(CMD_CTX, "Description: %s", aice.param.device_desc);
command_print(CMD_CTX, "Serial number: %s", aice.param.serial);
if (strncmp(aice.port->name, "aice_pipe", 9) == 0)
command_print(CMD_CTX, "Adapter: %s", aice.param.adapter_name);
command_print(CMD_CTX, "Description: %s", param.device_desc);
command_print(CMD_CTX, "Serial number: %s", param.serial);
if (strncmp(aice_port->name, "aice_pipe", 9) == 0)
command_print(CMD_CTX, "Adapter: %s", param.adapter_name);
return ERROR_OK;
}
@ -256,7 +266,7 @@ COMMAND_HANDLER(aice_handle_aice_port_command)
for (const struct aice_port *l = aice_port_get_list(); l->name; l++) {
if (strcmp(l->name, CMD_ARGV[0]) == 0) {
aice.port = l;
aice_port = l;
return ERROR_OK;
}
}
@ -270,7 +280,7 @@ COMMAND_HANDLER(aice_handle_aice_desc_command)
LOG_DEBUG("aice_handle_aice_desc_command");
if (CMD_ARGC == 1)
aice.param.device_desc = strdup(CMD_ARGV[0]);
param.device_desc = strdup(CMD_ARGV[0]);
else
LOG_ERROR("expected exactly one argument to aice desc <description>");
@ -282,7 +292,7 @@ COMMAND_HANDLER(aice_handle_aice_serial_command)
LOG_DEBUG("aice_handle_aice_serial_command");
if (CMD_ARGC == 1)
aice.param.serial = strdup(CMD_ARGV[0]);
param.serial = strdup(CMD_ARGV[0]);
else
LOG_ERROR("expected exactly one argument to aice serial <serial-number>");
@ -298,8 +308,8 @@ COMMAND_HANDLER(aice_handle_aice_vid_pid_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], aice.param.vid);
COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], aice.param.pid);
COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], param.vid);
COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], param.pid);
return ERROR_OK;
}
@ -309,7 +319,7 @@ COMMAND_HANDLER(aice_handle_aice_adapter_command)
LOG_DEBUG("aice_handle_aice_adapter_command");
if (CMD_ARGC == 1)
aice.param.adapter_name = strdup(CMD_ARGV[0]);
param.adapter_name = strdup(CMD_ARGV[0]);
else
LOG_ERROR("expected exactly one argument to aice adapter <adapter-name>");
@ -321,7 +331,7 @@ COMMAND_HANDLER(aice_handle_aice_retry_times_command)
LOG_DEBUG("aice_handle_aice_retry_times_command");
if (CMD_ARGC == 1)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], aice.retry_times);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], retry_times);
else
LOG_ERROR("expected exactly one argument to aice retry_times <num_of_retry>");
@ -333,7 +343,7 @@ COMMAND_HANDLER(aice_handle_aice_count_to_check_dbger_command)
LOG_DEBUG("aice_handle_aice_count_to_check_dbger_command");
if (CMD_ARGC == 1)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], aice.count_to_check_dbger);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], count_to_check_dbger);
else
LOG_ERROR("expected exactly one argument to aice count_to_check_dbger "
"<count_of_checking>");
@ -346,7 +356,7 @@ COMMAND_HANDLER(aice_handle_aice_custom_srst_script_command)
LOG_DEBUG("aice_handle_aice_custom_srst_script_command");
if (CMD_ARGC > 0) {
aice.port->api->set_custom_srst_script(CMD_ARGV[0]);
aice_port->api->set_custom_srst_script(CMD_ARGV[0]);
return ERROR_OK;
}
@ -358,7 +368,7 @@ COMMAND_HANDLER(aice_handle_aice_custom_trst_script_command)
LOG_DEBUG("aice_handle_aice_custom_trst_script_command");
if (CMD_ARGC > 0) {
aice.port->api->set_custom_trst_script(CMD_ARGV[0]);
aice_port->api->set_custom_trst_script(CMD_ARGV[0]);
return ERROR_OK;
}
@ -370,7 +380,7 @@ COMMAND_HANDLER(aice_handle_aice_custom_restart_script_command)
LOG_DEBUG("aice_handle_aice_custom_restart_script_command");
if (CMD_ARGC > 0) {
aice.port->api->set_custom_restart_script(CMD_ARGV[0]);
aice_port->api->set_custom_restart_script(CMD_ARGV[0]);
return ERROR_OK;
}
@ -381,7 +391,7 @@ COMMAND_HANDLER(aice_handle_aice_reset_command)
{
LOG_DEBUG("aice_handle_aice_reset_command");
return aice.port->api->reset();
return aice_port->api->reset();
}
@ -497,4 +507,3 @@ struct jtag_interface aice_interface = {
.speed_div = aice_speed_div, /* return readable value */
.khz = aice_khz, /* convert khz to interface speed value */
};

2
src/jtag/aice/aice_interface.h
View File

@ -31,6 +31,6 @@ struct aice_interface_param_s {
uint16_t pid;
};
int aice_init_target(struct target *t);
int aice_init_targets(void);
#endif

68
src/jtag/aice/aice_pipe.c
View File

@ -348,7 +348,7 @@ static int aice_pipe_idcode(uint32_t *idcode, uint8_t *num_of_idcode)
return ERROR_OK;
}
static int aice_pipe_state(enum aice_target_state_s *state)
static int aice_pipe_state(uint32_t coreid, enum aice_target_state_s *state)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -385,7 +385,7 @@ static int aice_pipe_reset(void)
return ERROR_FAIL;
}
static int aice_pipe_assert_srst(enum aice_srst_type_s srst)
static int aice_pipe_assert_srst(uint32_t coreid, enum aice_srst_type_s srst)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -405,7 +405,7 @@ static int aice_pipe_assert_srst(enum aice_srst_type_s srst)
return ERROR_FAIL;
}
static int aice_pipe_run(void)
static int aice_pipe_run(uint32_t coreid)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -424,7 +424,7 @@ static int aice_pipe_run(void)
return ERROR_FAIL;
}
static int aice_pipe_halt(void)
static int aice_pipe_halt(uint32_t coreid)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -443,7 +443,7 @@ static int aice_pipe_halt(void)
return ERROR_FAIL;
}
static int aice_pipe_read_reg(uint32_t num, uint32_t *val)
static int aice_pipe_read_reg(uint32_t coreid, uint32_t num, uint32_t *val)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -462,7 +462,7 @@ static int aice_pipe_read_reg(uint32_t num, uint32_t *val)
return ERROR_OK;
}
static int aice_pipe_write_reg(uint32_t num, uint32_t val)
static int aice_pipe_write_reg(uint32_t coreid, uint32_t num, uint32_t val)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -483,7 +483,7 @@ static int aice_pipe_write_reg(uint32_t num, uint32_t val)
return ERROR_FAIL;
}
static int aice_pipe_read_reg_64(uint32_t num, uint64_t *val)
static int aice_pipe_read_reg_64(uint32_t coreid, uint32_t num, uint64_t *val)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -502,7 +502,7 @@ static int aice_pipe_read_reg_64(uint32_t num, uint64_t *val)
return ERROR_OK;
}
static int aice_pipe_write_reg_64(uint32_t num, uint64_t val)
static int aice_pipe_write_reg_64(uint32_t coreid, uint32_t num, uint64_t val)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -524,7 +524,7 @@ static int aice_pipe_write_reg_64(uint32_t num, uint64_t val)
return ERROR_FAIL;
}
static int aice_pipe_step(void)
static int aice_pipe_step(uint32_t coreid)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -543,7 +543,7 @@ static int aice_pipe_step(void)
return ERROR_FAIL;
}
static int aice_pipe_read_mem_unit(uint32_t addr, uint32_t size,
static int aice_pipe_read_mem_unit(uint32_t coreid, uint32_t addr, uint32_t size,
uint32_t count, uint8_t *buffer)
{
char command[AICE_PIPE_MAXLINE];
@ -562,7 +562,7 @@ static int aice_pipe_read_mem_unit(uint32_t addr, uint32_t size,
return ERROR_OK;
}
static int aice_pipe_write_mem_unit(uint32_t addr, uint32_t size,
static int aice_pipe_write_mem_unit(uint32_t coreid, uint32_t addr, uint32_t size,
uint32_t count, const uint8_t *buffer)
{
char line[AICE_PIPE_MAXLINE];
@ -590,7 +590,8 @@ static int aice_pipe_write_mem_unit(uint32_t addr, uint32_t size,
return ERROR_OK;
}
static int aice_pipe_read_mem_bulk(uint32_t addr, uint32_t length, uint8_t *buffer)
static int aice_pipe_read_mem_bulk(uint32_t coreid, uint32_t addr,
uint32_t length, uint8_t *buffer)
{
char line[AICE_PIPE_MAXLINE + 1];
char command[AICE_PIPE_MAXLINE];
@ -636,7 +637,8 @@ static int aice_pipe_read_mem_bulk(uint32_t addr, uint32_t length, uint8_t *buff
return ERROR_OK;
}
static int aice_pipe_write_mem_bulk(uint32_t addr, uint32_t length, const uint8_t *buffer)
static int aice_pipe_write_mem_bulk(uint32_t coreid, uint32_t addr,
uint32_t length, const uint8_t *buffer)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE + 4];
@ -686,7 +688,7 @@ static int aice_pipe_write_mem_bulk(uint32_t addr, uint32_t length, const uint8_
return ERROR_FAIL;
}
static int aice_pipe_read_debug_reg(uint32_t addr, uint32_t *val)
static int aice_pipe_read_debug_reg(uint32_t coreid, uint32_t addr, uint32_t *val)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -705,7 +707,7 @@ static int aice_pipe_read_debug_reg(uint32_t addr, uint32_t *val)
return ERROR_OK;
}
static int aice_pipe_write_debug_reg(uint32_t addr, const uint32_t val)
static int aice_pipe_write_debug_reg(uint32_t coreid, uint32_t addr, const uint32_t val)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -746,27 +748,7 @@ static int aice_pipe_set_jtag_clock(uint32_t a_clock)
return ERROR_FAIL;
}
static int aice_pipe_select_target(uint32_t target_id)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
command[0] = AICE_SELECT_TARGET;
set_u32(command + 1, target_id);
if (aice_pipe_write(command, 5) != 5)
return ERROR_FAIL;
if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
return ERROR_FAIL;
if (line[0] == AICE_OK)
return ERROR_OK;
else
return ERROR_FAIL;
}
static int aice_pipe_memory_access(enum nds_memory_access access_channel)
static int aice_pipe_memory_access(uint32_t coreid, enum nds_memory_access access_channel)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -786,7 +768,7 @@ static int aice_pipe_memory_access(enum nds_memory_access access_channel)
return ERROR_FAIL;
}
static int aice_pipe_memory_mode(enum nds_memory_select mem_select)
static int aice_pipe_memory_mode(uint32_t coreid, enum nds_memory_select mem_select)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -806,7 +788,8 @@ static int aice_pipe_memory_mode(enum nds_memory_select mem_select)
return ERROR_FAIL;
}
static int aice_pipe_read_tlb(uint32_t virtual_address, uint32_t *physical_address)
static int aice_pipe_read_tlb(uint32_t coreid, uint32_t virtual_address,
uint32_t *physical_address)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -827,7 +810,7 @@ static int aice_pipe_read_tlb(uint32_t virtual_address, uint32_t *physical_addre
return ERROR_FAIL;
}
static int aice_pipe_cache_ctl(uint32_t subtype, uint32_t address)
static int aice_pipe_cache_ctl(uint32_t coreid, uint32_t subtype, uint32_t address)
{
char line[AICE_PIPE_MAXLINE];
char command[AICE_PIPE_MAXLINE];
@ -862,6 +845,8 @@ struct aice_port_api_s aice_pipe = {
/** */
.idcode = aice_pipe_idcode,
/** */
.set_jtag_clock = aice_pipe_set_jtag_clock,
/** */
.state = aice_pipe_state,
/** */
.reset = aice_pipe_reset,
@ -894,11 +879,6 @@ struct aice_port_api_s aice_pipe = {
/** */
.write_debug_reg = aice_pipe_write_debug_reg,
/** */
.set_jtag_clock = aice_pipe_set_jtag_clock,
/** */
.select_target = aice_pipe_select_target,
/** */
.memory_access = aice_pipe_memory_access,
/** */

104
src/jtag/aice/aice_port.h
View File

@ -22,6 +22,8 @@
#include <target/nds32_edm.h>
#define AICE_MAX_NUM_CORE (0x10)
#define ERROR_AICE_DISCONNECT (-200)
#define ERROR_AICE_TIMEOUT (-201)
@ -49,6 +51,8 @@ enum aice_api_s {
AICE_OPEN = 0x0,
AICE_CLOSE,
AICE_RESET,
AICE_IDCODE,
AICE_SET_JTAG_CLOCK,
AICE_ASSERT_SRST,
AICE_RUN,
AICE_HALT,
@ -63,10 +67,7 @@ enum aice_api_s {
AICE_WRITE_MEM_BULK,
AICE_READ_DEBUG_REG,
AICE_WRITE_DEBUG_REG,
AICE_IDCODE,
AICE_STATE,
AICE_SET_JTAG_CLOCK,
AICE_SELECT_TARGET,
AICE_MEMORY_ACCESS,
AICE_MEMORY_MODE,
AICE_READ_TLB,
@ -118,13 +119,9 @@ struct aice_port_param_s {
struct aice_port_s {
/** */
struct aice_port_param_s param;
uint32_t coreid;
/** */
const struct aice_port *port;
/** */
uint32_t retry_times;
/** */
uint32_t count_to_check_dbger;
};
/** */
@ -138,71 +135,68 @@ struct aice_port_api_s {
int (*close)(void);
/** */
int (*reset)(void);
/** */
int (*assert_srst)(enum aice_srst_type_s srst);
/** */
int (*run)(void);
/** */
int (*halt)(void);
/** */
int (*step)(void);
/** */
int (*read_reg)(uint32_t num, uint32_t *val);
/** */
int (*write_reg)(uint32_t num, uint32_t val);
/** */
int (*read_reg_64)(uint32_t num, uint64_t *val);
/** */
int (*write_reg_64)(uint32_t num, uint64_t val);
/** */
int (*read_mem_unit)(uint32_t addr, uint32_t size, uint32_t count,
uint8_t *buffer);
/** */
int (*write_mem_unit)(uint32_t addr, uint32_t size, uint32_t count,
const uint8_t *buffer);
/** */
int (*read_mem_bulk)(uint32_t addr, uint32_t length,
uint8_t *buffer);
/** */
int (*write_mem_bulk)(uint32_t addr, uint32_t length,
const uint8_t *buffer);
/** */
int (*read_debug_reg)(uint32_t addr, uint32_t *val);
/** */
int (*write_debug_reg)(uint32_t addr, const uint32_t val);
/** */
int (*idcode)(uint32_t *idcode, uint8_t *num_of_idcode);
/** */
int (*state)(enum aice_target_state_s *state);
/** */
int (*set_jtag_clock)(uint32_t a_clock);
/** */
int (*select_target)(uint32_t target_id);
int (*assert_srst)(uint32_t coreid, enum aice_srst_type_s srst);
/** */
int (*run)(uint32_t coreid);
/** */
int (*halt)(uint32_t coreid);
/** */
int (*step)(uint32_t coreid);
/** */
int (*read_reg)(uint32_t coreid, uint32_t num, uint32_t *val);
/** */
int (*write_reg)(uint32_t coreid, uint32_t num, uint32_t val);
/** */
int (*read_reg_64)(uint32_t coreid, uint32_t num, uint64_t *val);
/** */
int (*write_reg_64)(uint32_t coreid, uint32_t num, uint64_t val);
/** */
int (*read_mem_unit)(uint32_t coreid, uint32_t addr, uint32_t size,
uint32_t count, uint8_t *buffer);
/** */
int (*write_mem_unit)(uint32_t coreid, uint32_t addr, uint32_t size,
uint32_t count, const uint8_t *buffer);
/** */
int (*read_mem_bulk)(uint32_t coreid, uint32_t addr, uint32_t length,
uint8_t *buffer);
/** */
int (*write_mem_bulk)(uint32_t coreid, uint32_t addr, uint32_t length,
const uint8_t *buffer);
/** */
int (*read_debug_reg)(uint32_t coreid, uint32_t addr, uint32_t *val);
/** */
int (*write_debug_reg)(uint32_t coreid, uint32_t addr, const uint32_t val);
/** */
int (*memory_access)(enum nds_memory_access a_access);
/** */
int (*memory_mode)(enum nds_memory_select mem_select);
int (*state)(uint32_t coreid, enum aice_target_state_s *state);
/** */
int (*read_tlb)(uint32_t virtual_address, uint32_t *physical_address);
int (*memory_access)(uint32_t coreid, enum nds_memory_access a_access);
/** */
int (*memory_mode)(uint32_t coreid, enum nds_memory_select mem_select);
/** */
int (*cache_ctl)(uint32_t subtype, uint32_t address);
int (*read_tlb)(uint32_t coreid, uint32_t virtual_address, uint32_t *physical_address);
/** */
int (*cache_ctl)(uint32_t coreid, uint32_t subtype, uint32_t address);
/** */
int (*set_retry_times)(uint32_t a_retry_times);
/** */
int (*program_edm)(char *command_sequence);
int (*program_edm)(uint32_t coreid, char *command_sequence);
/** */
int (*set_command_mode)(enum aice_command_mode command_mode);
/** */
int (*execute)(uint32_t *instructions, uint32_t instruction_num);
int (*execute)(uint32_t coreid, uint32_t *instructions, uint32_t instruction_num);
/** */
int (*set_custom_srst_script)(const char *script);
@ -217,10 +211,10 @@ struct aice_port_api_s {
int (*set_count_to_check_dbger)(uint32_t count_to_check);
/** */
int (*set_data_endian)(enum aice_target_endian target_data_endian);
int (*set_data_endian)(uint32_t coreid, enum aice_target_endian target_data_endian);
/** */
int (*profiling)(uint32_t interval, uint32_t iteration,
int (*profiling)(uint32_t coreid, uint32_t interval, uint32_t iteration,
uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
};
@ -235,7 +229,7 @@ struct aice_port {
/** */
int type;
/** */
struct aice_port_api_s *api;
struct aice_port_api_s *const api;
};
/** */

2
src/jtag/aice/aice_transport.c
View File

@ -351,7 +351,7 @@ static int aice_transport_init(struct command_context *cmd_ctx)
LOG_DEBUG("current transport %s", transport->name);
return aice_init_target(t);
return aice_init_targets();
}
/* */

1058
src/jtag/aice/aice_usb.c
View File

File diff suppressed because it is too large Load Diff

29
src/jtag/aice/aice_usb.h
View File

@ -156,6 +156,35 @@ struct aice_usb_handler_s {
struct jtag_libusb_device_handle *usb_handle;
};
struct cache_info {
uint32_t set;
uint32_t way;
uint32_t line_size;
uint32_t log2_set;
uint32_t log2_line_size;
};
struct aice_nds32_info {
uint32_t edm_version;
uint32_t r0_backup;
uint32_t r1_backup;
uint32_t host_dtr_backup;
uint32_t target_dtr_backup;
uint32_t edmsw_backup;
uint32_t edm_ctl_backup;
bool debug_under_dex_on;
bool dex_use_psw_on;
bool host_dtr_valid;
bool target_dtr_valid;
enum nds_memory_access access_channel;
enum nds_memory_select memory_select;
enum aice_target_state_s core_state;
bool cache_init;
struct cache_info icache;
struct cache_info dcache;
};
extern struct aice_port_api_s aice_usb_api;
int aice_read_ctrl(uint32_t address, uint32_t *data);

51
src/target/nds32.c
View File

@ -395,7 +395,7 @@ static const struct reg_arch_type nds32_reg_access_type_64 = {
static struct reg_cache *nds32_build_reg_cache(struct target *target,
struct nds32 *nds32)
{
struct reg_cache *cache = malloc(sizeof(struct reg_cache));
struct reg_cache *cache = calloc(sizeof(struct reg_cache), 1);
struct reg *reg_list = calloc(TOTAL_REG_NUM, sizeof(struct reg));
struct nds32_reg *reg_arch_info = calloc(TOTAL_REG_NUM, sizeof(struct nds32_reg));
int i;
@ -423,7 +423,7 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target,
reg_list[i].size = nds32_reg_size(i);
reg_list[i].arch_info = &reg_arch_info[i];
reg_list[i].reg_data_type = malloc(sizeof(struct reg_data_type));
reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1);
if (FD0 <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) {
reg_list[i].value = &(reg_arch_info[i].value_64);
@ -1649,6 +1649,15 @@ int nds32_init_arch_info(struct target *target, struct nds32 *nds32)
nds32->active_syscall_id = NDS32_SYSCALL_UNDEFINED;
nds32->virtual_hosting_errno = 0;
nds32->virtual_hosting_ctrl_c = false;
nds32->attached = false;
nds32->syscall_break.asid = 0;
nds32->syscall_break.length = 4;
nds32->syscall_break.set = 0;
nds32->syscall_break.orig_instr = NULL;
nds32->syscall_break.next = NULL;
nds32->syscall_break.unique_id = 0x515CAll + target->target_number;
nds32->syscall_break.linked_BRP = 0;
nds32_reg_init();
@ -2187,27 +2196,21 @@ int nds32_assert_reset(struct target *target)
return ERROR_OK;
}
static uint32_t nds32_backup_edm_ctl;
static bool gdb_attached;
static int nds32_gdb_attach(struct nds32 *nds32)
{
LOG_DEBUG("nds32_gdb_attach");
LOG_DEBUG("nds32_gdb_attach, target coreid: %d", nds32->target->coreid);
if (gdb_attached == false) {
if (nds32->attached == false) {
if (nds32->keep_target_edm_ctl) {
/* backup target EDM_CTL */
struct aice_port_s *aice = target_to_aice(nds32->target);
aice_read_debug_reg(aice, NDS_EDM_SR_EDM_CTL, &nds32_backup_edm_ctl);
aice_read_debug_reg(aice, NDS_EDM_SR_EDM_CTL, &nds32->backup_edm_ctl);
}
target_halt(nds32->target);
/* turn on polling */
jtag_poll_set_enabled(true);
gdb_attached = true;
nds32->attached = true;
}
return ERROR_OK;
@ -2218,7 +2221,7 @@ static int nds32_gdb_detach(struct nds32 *nds32)
LOG_DEBUG("nds32_gdb_detach");
bool backup_virtual_hosting_setting;
if (gdb_attached) {
if (nds32->attached) {
backup_virtual_hosting_setting = nds32->virtual_hosting;
/* turn off virtual hosting before resume as gdb-detach */
@ -2229,13 +2232,10 @@ static int nds32_gdb_detach(struct nds32 *nds32)
if (nds32->keep_target_edm_ctl) {
/* restore target EDM_CTL */
struct aice_port_s *aice = target_to_aice(nds32->target);
aice_write_debug_reg(aice, NDS_EDM_SR_EDM_CTL, nds32_backup_edm_ctl);
aice_write_debug_reg(aice, NDS_EDM_SR_EDM_CTL, nds32->backup_edm_ctl);
}
/* turn off polling */
jtag_poll_set_enabled(false);
gdb_attached = false;
nds32->attached = false;
}
return ERROR_OK;
@ -2245,7 +2245,12 @@ static int nds32_callback_event_handler(struct target *target,
enum target_event event, void *priv)
{
int retval = ERROR_OK;
struct nds32 *nds32 = priv;
int target_number = *(int *)priv;
if (target_number != target->target_number)
return ERROR_OK;
struct nds32 *nds32 = target_to_nds32(target);
switch (event) {
case TARGET_EVENT_GDB_ATTACH:
@ -2266,11 +2271,9 @@ int nds32_init(struct nds32 *nds32)
/* Initialize anything we can set up without talking to the target */
nds32->memory.access_channel = NDS_MEMORY_ACC_CPU;
/* turn off polling by default */
jtag_poll_set_enabled(false);
/* register event callback */
target_register_event_callback(nds32_callback_event_handler, nds32);
target_register_event_callback(nds32_callback_event_handler,
&(nds32->target->target_number));
return ERROR_OK;
}
@ -2467,7 +2470,7 @@ int nds32_profiling(struct target *target, uint32_t *samples,
iteration = max_num_samples;
int pc_regnum = nds32->register_map(nds32, PC);
aice->port->api->profiling(10, iteration, pc_regnum, samples, num_samples);
aice_profiling(aice, 10, iteration, pc_regnum, samples, num_samples);
register_cache_invalidate(nds32->core_cache);

8
src/target/nds32.h
View File

@ -296,6 +296,8 @@ struct nds32 {
/** Record syscall ID for other operations to do special processing for target */
int active_syscall_id;
struct breakpoint syscall_break;
/** Flag reporting whether global stop is active. */
bool global_stop;
@ -309,6 +311,9 @@ struct nds32 {
* handler, it should be true. */
bool keep_target_edm_ctl;
/* Value of $EDM_CTL before target enters debug mode */
uint32_t backup_edm_ctl;
/** always use word-aligned address to access memory */
bool word_access_mem;
@ -346,6 +351,9 @@ struct nds32 {
* hardware breakpoints or not in ROM */
bool auto_convert_hw_bp;
/* Flag to indicate the target is attached by debugger or not */
bool attached;
/** Backpointer to the target. */
struct target *target;

34
src/target/nds32_aice.c
View File

@ -31,7 +31,7 @@ int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val)
return ERROR_FAIL;
}
return aice->port->api->read_reg_64(num, val);
return aice->port->api->read_reg_64(aice->coreid, num, val);
}
int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val)
@ -41,17 +41,7 @@ int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val)
return ERROR_FAIL;
}
return aice->port->api->write_reg_64(num, val);
}
int aice_select_target(struct aice_port_s *aice, uint32_t target_id)
{
if (aice->port->api->select_target == NULL) {
LOG_WARNING("Not implemented: %s", __func__);
return ERROR_FAIL;
}
return aice->port->api->select_target(target_id);
return aice->port->api->write_reg_64(aice->coreid, num, val);
}
int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
@ -62,7 +52,7 @@ int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
return ERROR_FAIL;
}
return aice->port->api->read_tlb(virtual_address, physical_address);
return aice->port->api->read_tlb(aice->coreid, virtual_address, physical_address);
}
int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address)
@ -72,7 +62,7 @@ int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address)
return ERROR_FAIL;
}
return aice->port->api->cache_ctl(subtype, address);
return aice->port->api->cache_ctl(aice->coreid, subtype, address);
}
int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times)
@ -92,7 +82,7 @@ int aice_program_edm(struct aice_port_s *aice, char *command_sequence)
return ERROR_FAIL;
}
return aice->port->api->program_edm(command_sequence);
return aice->port->api->program_edm(aice->coreid, command_sequence);
}
int aice_set_command_mode(struct aice_port_s *aice,
@ -114,7 +104,7 @@ int aice_execute(struct aice_port_s *aice, uint32_t *instructions,
return ERROR_FAIL;
}
return aice->port->api->execute(instructions, instruction_num);
return aice->port->api->execute(aice->coreid, instructions, instruction_num);
}
int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script)
@ -156,3 +146,15 @@ int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_ch
return aice->port->api->set_count_to_check_dbger(count_to_check);
}
int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration,
uint32_t reg_no, uint32_t *samples, uint32_t *num_samples)
{
if (aice->port->api->profiling == NULL) {
LOG_WARNING("Not implemented: %s", __func__);
return ERROR_FAIL;
}
return aice->port->api->profiling(aice->coreid, interval, iteration,
reg_no, samples, num_samples);
}

35
src/target/nds32_aice.h
View File

@ -24,7 +24,6 @@
int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val);
int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val);
int aice_select_target(struct aice_port_s *aice, uint32_t target_id);
int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
uint32_t *physical_address);
int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address);
@ -38,6 +37,8 @@ int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script);
int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script);
int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script);
int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_check);
int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration,
uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
static inline int aice_open(struct aice_port_s *aice, struct aice_port_param_s *param)
{
@ -57,70 +58,70 @@ static inline int aice_reset(struct aice_port_s *aice)
static inline int aice_assert_srst(struct aice_port_s *aice,
enum aice_srst_type_s srst)
{
return aice->port->api->assert_srst(srst);
return aice->port->api->assert_srst(aice->coreid, srst);
}
static inline int aice_run(struct aice_port_s *aice)
{
return aice->port->api->run();
return aice->port->api->run(aice->coreid);
}
static inline int aice_halt(struct aice_port_s *aice)
{
return aice->port->api->halt();
return aice->port->api->halt(aice->coreid);
}
static inline int aice_step(struct aice_port_s *aice)
{
return aice->port->api->step();
return aice->port->api->step(aice->coreid);
}
static inline int aice_read_register(struct aice_port_s *aice, uint32_t num,
uint32_t *val)
{
return aice->port->api->read_reg(num, val);
return aice->port->api->read_reg(aice->coreid, num, val);
}
static inline int aice_write_register(struct aice_port_s *aice, uint32_t num,
uint32_t val)
{
return aice->port->api->write_reg(num, val);
return aice->port->api->write_reg(aice->coreid, num, val);
}
static inline int aice_read_debug_reg(struct aice_port_s *aice, uint32_t addr,
uint32_t *val)
{
return aice->port->api->read_debug_reg(addr, val);
return aice->port->api->read_debug_reg(aice->coreid, addr, val);
}
static inline int aice_write_debug_reg(struct aice_port_s *aice, uint32_t addr,
const uint32_t val)
{
return aice->port->api->write_debug_reg(addr, val);
return aice->port->api->write_debug_reg(aice->coreid, addr, val);
}
static inline int aice_read_mem_unit(struct aice_port_s *aice, uint32_t addr,
uint32_t size, uint32_t count, uint8_t *buffer)
{
return aice->port->api->read_mem_unit(addr, size, count, buffer);
return aice->port->api->read_mem_unit(aice->coreid, addr, size, count, buffer);
}
static inline int aice_write_mem_unit(struct aice_port_s *aice, uint32_t addr,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
return aice->port->api->write_mem_unit(addr, size, count, buffer);
return aice->port->api->write_mem_unit(aice->coreid, addr, size, count, buffer);
}
static inline int aice_read_mem_bulk(struct aice_port_s *aice, uint32_t addr,
uint32_t length, uint8_t *buffer)
{
return aice->port->api->read_mem_bulk(addr, length, buffer);
return aice->port->api->read_mem_bulk(aice->coreid, addr, length, buffer);
}
static inline int aice_write_mem_bulk(struct aice_port_s *aice, uint32_t addr,
uint32_t length, const uint8_t *buffer)
{
return aice->port->api->write_mem_bulk(addr, length, buffer);
return aice->port->api->write_mem_bulk(aice->coreid, addr, length, buffer);
}
static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
@ -132,7 +133,7 @@ static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
static inline int aice_state(struct aice_port_s *aice,
enum aice_target_state_s *state)
{
return aice->port->api->state(state);
return aice->port->api->state(aice->coreid, state);
}
static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock)
@ -143,19 +144,19 @@ static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock
static inline int aice_memory_access(struct aice_port_s *aice,
enum nds_memory_access a_access)
{
return aice->port->api->memory_access(a_access);
return aice->port->api->memory_access(aice->coreid, a_access);
}
static inline int aice_memory_mode(struct aice_port_s *aice,
enum nds_memory_select mem_select)
{
return aice->port->api->memory_mode(mem_select);
return aice->port->api->memory_mode(aice->coreid, mem_select);
}
static inline int aice_set_data_endian(struct aice_port_s *aice,
enum aice_target_endian target_data_endian)
{
return aice->port->api->set_data_endian(target_data_endian);
return aice->port->api->set_data_endian(aice->coreid, target_data_endian);
}
#endif

31
src/target/nds32_v3_common.c
View File

@ -29,18 +29,6 @@
#include "nds32_aice.h"
#include "nds32_v3_common.h"
static struct breakpoint syscall_breakpoint = {
0x80,
0,
4,
BKPT_SOFT,
0,
NULL,
NULL,
0x515CA11,
0,
};
static struct nds32_v3_common_callback *v3_common_callback;
static int nds32_v3_register_mapping(struct nds32 *nds32, int reg_no)
@ -90,17 +78,18 @@ static int nds32_v3_debug_entry(struct nds32 *nds32, bool enable_watchpoint)
if (enable_watchpoint)
CHECK_RETVAL(v3_common_callback->deactivate_hardware_watchpoint(nds32->target));
struct breakpoint *syscall_break = &(nds32->syscall_break);
if (nds32->virtual_hosting) {
if (syscall_breakpoint.set) {
if (syscall_break->set) {
/** disable virtual hosting */
/* remove breakpoint at syscall entry */
target_remove_breakpoint(nds32->target, &syscall_breakpoint);
syscall_breakpoint.set = 0;
target_remove_breakpoint(nds32->target, syscall_break);
syscall_break->set = 0;
uint32_t value_pc;
nds32_get_mapped_reg(nds32, PC, &value_pc);
if (value_pc == syscall_breakpoint.address)
if (value_pc == syscall_break->address)
/** process syscall for virtual hosting */
nds32->hit_syscall = true;
}
@ -218,10 +207,12 @@ static int nds32_v3_leave_debug_state(struct nds32 *nds32, bool enable_watchpoin
}
/* insert breakpoint at syscall entry */
syscall_breakpoint.address = syscall_address;
syscall_breakpoint.type = BKPT_SOFT;
syscall_breakpoint.set = 1;
target_add_breakpoint(target, &syscall_breakpoint);
struct breakpoint *syscall_break = &(nds32->syscall_break);
syscall_break->address = syscall_address;
syscall_break->type = BKPT_SOFT;
syscall_break->set = 1;
target_add_breakpoint(target, syscall_break);
}
return ERROR_OK;