Read misa during examine(), using program buffer.
Change-Id: Icad5324d216b61207cb5f6024b2deab065658640__archive__
Tim Newsome
parent
0fa8162a8c
commit
24033b53d8
File diff suppressed because it is too large
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@ -649,6 +649,121 @@ static uint64_t scans_get_u64(scans_t *scans, unsigned int index,
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/*** end of scans class ***/
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/** Convert register number (internal OpenOCD number) to the number expected by
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* the abstract command interface. */
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static unsigned reg_number_to_no(unsigned reg_num)
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{
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if (reg_num <= REG_XPR31) {
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return reg_num + 0x1000 - REG_XPR0;
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} else if (reg_num >= REG_CSR0 && reg_num <= REG_CSR4095) {
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return reg_num - REG_CSR0;
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} else if (reg_num >= REG_FPR0 && reg_num <= REG_FPR31) {
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return reg_num + 0x1020 - REG_FPR0;
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} else {
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return ~0;
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}
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}
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uint32_t abstract_register_size(unsigned width)
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{
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switch (width) {
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case 32:
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return set_field(0, AC_ACCESS_REGISTER_SIZE, 2);
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case 64:
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return set_field(0, AC_ACCESS_REGISTER_SIZE, 3);
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break;
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case 128:
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return set_field(0, AC_ACCESS_REGISTER_SIZE, 4);
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break;
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default:
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LOG_ERROR("Unsupported register width: %d", width);
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return 0;
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}
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}
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static int execute_abstract_command(struct target *target, uint32_t command)
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{
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dmi_write(target, DMI_COMMAND, command);
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uint32_t abstractcs;
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for (unsigned i = 0; i < 256; i++) {
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abstractcs = dmi_read(target, DMI_ABSTRACTCS);
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if (get_field(abstractcs, DMI_ABSTRACTCS_BUSY) == 0)
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break;
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}
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if (get_field(abstractcs, DMI_ABSTRACTCS_BUSY)) {
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LOG_ERROR("Abstract command 0x%x never completed (abstractcs=0x%x)",
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command, abstractcs);
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return ERROR_FAIL;
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}
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if (get_field(abstractcs, DMI_ABSTRACTCS_CMDERR)) {
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const char *errors[8] = {
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"none",
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"busy",
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"not supported",
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"exception",
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"halt/resume",
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"reserved",
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"reserved",
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"other" };
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LOG_DEBUG("Abstract command 0x%x ended in error '%s' (abstractcs=0x%x)",
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command, errors[get_field(abstractcs, DMI_ABSTRACTCS_CMDERR)],
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abstractcs);
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// Clear the error.
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dmi_write(target, DMI_ABSTRACTCS, 0);
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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/*** program "class" ***/
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/* This class allows a debug program to be built up piecemeal, and then be
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* executed. If necessary, the program is split up to fit in the program
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* buffer. */
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typedef struct {
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uint8_t code[12 * 4];
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unsigned length;
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bool write;
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unsigned regno;
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uint64_t write_value;
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} program_t;
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static program_t *program_new(void)
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{
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program_t *program = malloc(sizeof(program_t));
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if (program) {
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program->length = 0;
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// Default to read zero.
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program->write = false;
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program->regno = 0x1000;
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}
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return program;
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}
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static void program_delete(program_t *program)
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{
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free(program);
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}
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static void program_add32(program_t *program, uint32_t instruction)
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{
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assert(program->length + 4 < sizeof(program->code));
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program->code[program->length++] = instruction & 0xff;
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program->code[program->length++] = (instruction >> 8) & 0xff;
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program->code[program->length++] = (instruction >> 16) & 0xff;
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program->code[program->length++] = (instruction >> 24) & 0xff;
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}
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static void program_set_read(program_t *program, unsigned reg_num)
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{
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program->write = false;
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program->regno = reg_number_to_no(reg_num);
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}
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/*** end of program class ***/
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static uint32_t dram_read32(struct target *target, unsigned int index)
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{
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uint16_t address = dram_address(index);
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@ -979,15 +1094,80 @@ static int wait_for_state(struct target *target, enum target_state state)
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}
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}
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static int execute_program(struct target *target, const program_t *program)
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{
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riscv013_info_t *info = get_info(target);
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assert(program->length <= info->progsize * 4);
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for (unsigned i = 0; i < program->length; i += 4) {
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uint32_t value =
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program->code[i] |
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((uint32_t) program->code[i+1] << 8) |
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((uint32_t) program->code[i+2] << 16) |
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((uint32_t) program->code[i+3] << 24);
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dmi_write(target, DMI_IBUF0 + i / 4, value);
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}
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uint32_t command = 0;
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if (program->write) {
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command |= AC_ACCESS_REGISTER_WRITE | AC_ACCESS_REGISTER_POSTEXEC;
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} else {
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command |= AC_ACCESS_REGISTER_PREEXEC;
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}
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command |= abstract_register_size(xlen(target));
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command |= program->regno;
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return execute_abstract_command(target, command);
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}
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static int abstract_read_register(struct target *target,
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unsigned reg_number,
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unsigned width,
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uint64_t *value)
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{
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uint32_t command = abstract_register_size(width);
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command |= reg_number_to_no(reg_number);
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int result = execute_abstract_command(target, command);
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if (result != ERROR_OK) {
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return result;
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}
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if (value) {
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*value = 0;
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switch (width) {
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case 128:
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LOG_WARNING("Ignoring top 64 bits from 128-bit register read.");
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case 64:
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*value |= ((uint64_t) dmi_read(target, DMI_DATA0)) << 32;
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case 32:
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*value |= dmi_read(target, DMI_DATA0);
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break;
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}
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}
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return ERROR_OK;
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}
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static int read_csr(struct target *target, uint64_t *value, uint32_t csr)
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{
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cache_set32(target, 0, csrr(S0, csr));
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cache_set_store(target, 1, S0, SLOT0);
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cache_set_jump(target, 2);
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if (cache_write(target, 4, true) != ERROR_OK) {
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return ERROR_FAIL;
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}
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*value = cache_get(target, SLOT0);
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int result = abstract_read_register(target, csr, xlen(target), value);
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if (result == ERROR_OK)
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return result;
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// Fall back to program buffer.
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program_t *program = program_new();
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program_add32(program, csrr(S0, csr));
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program_add32(program, ebreak());
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program_set_read(program, S0);
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execute_program(target, program);
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program_delete(program);
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result = abstract_read_register(target, S0, xlen(target), value);
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if (result != ERROR_OK)
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return result;
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LOG_DEBUG("csr 0x%x = 0x%" PRIx64, csr, *value);
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return ERROR_OK;
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@ -1738,72 +1918,6 @@ static int step(struct target *target, int current, uint32_t address,
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return ERROR_OK;
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}
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static int abstract_read_register(struct target *target,
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unsigned reg_number,
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unsigned width,
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uint64_t *result)
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{
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uint32_t command = 0;
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switch (width) {
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case 32:
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command = set_field(command, AC_ACCESS_REGISTER_SIZE, 2);
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break;
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case 64:
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command = set_field(command, AC_ACCESS_REGISTER_SIZE, 3);
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break;
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case 128:
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command = set_field(command, AC_ACCESS_REGISTER_SIZE, 4);
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break;
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default:
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LOG_ERROR("Unsupported register width: %d", width);
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return ERROR_FAIL;
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}
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if (reg_number <= REG_XPR31) {
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command |= reg_number + 0x1000 - REG_XPR0;
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} else if (reg_number >= REG_CSR0 && reg_number <= REG_CSR4095) {
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command |= reg_number - REG_CSR0;
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} else if (reg_number >= REG_FPR0 && reg_number <= REG_FPR31) {
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command |= reg_number + 0x1020 - REG_FPR0;
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}
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dmi_write(target, DMI_COMMAND, command);
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uint32_t abstractcs;
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for (unsigned i = 0; i < 256; i++) {
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abstractcs = dmi_read(target, DMI_ABSTRACTCS);
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if (get_field(abstractcs, DMI_ABSTRACTCS_BUSY) == 0)
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break;
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}
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if (get_field(abstractcs, DMI_ABSTRACTCS_BUSY)) {
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LOG_ERROR("Abstract command 0x%x never completed (abstractcs=0x%x)",
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command, abstractcs);
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return ERROR_FAIL;
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}
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if (get_field(abstractcs, DMI_ABSTRACTCS_CMDERR)) {
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LOG_DEBUG("Abstract command 0x%x ended in error (abstractcs=0x%x)",
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command, abstractcs);
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// Clear the error.
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dmi_write(target, DMI_ABSTRACTCS, 0);
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return ERROR_FAIL;
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}
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if (result) {
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*result = 0;
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switch (width) {
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case 128:
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LOG_WARNING("Ignoring top 64 bits from 128-bit register read.");
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case 64:
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*result |= ((uint64_t) dmi_read(target, DMI_DATA0)) << 32;
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case 32:
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*result |= dmi_read(target, DMI_DATA0);
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break;
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}
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}
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return ERROR_OK;
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}
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static int examine(struct target *target)
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{
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// Don't need to select dbus, since the first thing we do is read dtmcontrol.
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