nrf5: Add nRF52832-QFAA support

Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4210
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
fence_i_fix_for_release
Slowcoder 2017-08-31 22:34:16 +02:00 committed by Spencer Oliver
parent d43308af75
commit 2168c475ff
2 changed files with 17 additions and 1 deletions

View File

@ -195,6 +195,9 @@ static const struct nrf5_device_spec nrf5_known_devices_table[] = {
NRF5_DEVICE_DEF(0x007A, "51422", "CEAA", "C0", 256),
NRF5_DEVICE_DEF(0x0088, "51422", "CFAC", "A0", 256),
/* nRF52832 Devices */
NRF5_DEVICE_DEF(0x00C7, "52832", "QFAA", "B0", 512),
/* Some early nRF51-DK (PCA10028) & nRF51-Dongle (PCA10031) boards
with built-in jlink seem to use engineering samples not listed
in the nRF51 Series Compatibility Matrix V1.0. */

View File

@ -10,6 +10,14 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME nrf52
}
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
@ -21,8 +29,13 @@ swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
adapter_khz 10000
adapter_khz 1000
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
if { ![using_hla] } {
cortex_m reset_config sysresetreq
}
flash bank $_CHIPNAME.flash nrf5 0x00000000 0 1 1 $_TARGETNAME
flash bank $_CHIPNAME.uicr nrf5 0x10001000 0 1 1 $_TARGETNAME