tcl/target/stm32l4x.cfg: Reduce adapter speed before reset.

Change-Id: I200286c0b980369f74e8f1e497bc5e565ddb616d
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3366
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
__archive__
Uwe Bonnes 2016-02-28 19:20:43 +01:00 committed by Andreas Fritiofson
parent 4b11548748
commit 20466e5374
1 changed files with 13 additions and 8 deletions

View File

@ -58,12 +58,12 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
# JTAG speed should be <= F_CPU/6. F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz
# Common knowledges tells JTAG speed should be <= F_CPU/6.
# F_CPU after reset is MSI 4MHz, so use F_JTAG = 500 kHz to stay on
# the safe side.
#
# Since we may be running of an RC oscilator, we crank down the speed a
# bit more to be on the safe side. Perhaps superstition, but if are
# running off a crystal, we can run closer to the limit. Note
# that there can be a pretty wide band where things are more or less stable.
# Note that there is a pretty wide band where things are
# more or less stable, see http://openocd.zylin.com/#/c/3366/
adapter_khz 500
adapter_nsrst_delay 100
@ -81,14 +81,19 @@ if {![using_hla]} {
$_TARGETNAME configure -event reset-init {
# CPU comes out of reset with MSI_ON | MSI_RDY | MSI Range 6 (4 MHz).
# Configure system to use MSI 24 MHz clock, compliant with VOS default (2).
# 3 WS compliant with VOS=2 and 24 MHz.
mww 0x40022000 0x00000102 ;# FLASH_ACR = PRFTBE | 3(Latency)
# Use MSI 24 MHz clock, compliant even with VOS == 2.
# 3 WS compliant with VOS == 2 and 24 MHz.
mww 0x40022000 0x00000103 ;# FLASH_ACR = PRFTBE | 3(Latency)
mww 0x40021000 0x00000099 ;# RCC_CR = MSI_ON | MSIRGSEL| MSI Range 10
# Boost JTAG frequency
adapter_khz 4000
}
$_TARGETNAME configure -event reset-start {
# Reset clock is MSI (4 MHz)
adapter_khz 500
}
$_TARGETNAME configure -event examine-end {
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0