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@ -66,7 +66,7 @@ static int adapter_load_core_reg_u32(struct target *target,
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switch (num) {
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switch (num) {
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case 0 ... 18:
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case 0 ... 18:
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/* read a normal core register */
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/* read a normal core register */
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retval = adapter->layout->api->read_reg(adapter->fd, num, value);
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retval = adapter->layout->api->read_reg(adapter->handle, num, value);
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if (retval != ERROR_OK) {
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if (retval != ERROR_OK) {
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LOG_ERROR("JTAG failure %i", retval);
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LOG_ERROR("JTAG failure %i", retval);
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@ -114,7 +114,7 @@ static int adapter_load_core_reg_u32(struct target *target,
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* in one Debug Core register. So say r0 and r2 docs;
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* in one Debug Core register. So say r0 and r2 docs;
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* it was removed from r1 docs, but still works.
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* it was removed from r1 docs, but still works.
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*/
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*/
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retval = adapter->layout->api->read_reg(adapter->fd, 20, value);
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retval = adapter->layout->api->read_reg(adapter->handle, 20, value);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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@ -163,7 +163,7 @@ static int adapter_store_core_reg_u32(struct target *target,
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*/
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*/
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switch (num) {
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switch (num) {
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case 0 ... 18:
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case 0 ... 18:
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retval = adapter->layout->api->write_reg(adapter->fd, num, value);
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retval = adapter->layout->api->write_reg(adapter->handle, num, value);
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if (retval != ERROR_OK) {
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if (retval != ERROR_OK) {
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struct reg *r;
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struct reg *r;
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@ -214,7 +214,7 @@ static int adapter_store_core_reg_u32(struct target *target,
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* it was removed from r1 docs, but still works.
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* it was removed from r1 docs, but still works.
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*/
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*/
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adapter->layout->api->read_reg(adapter->fd, 20, ®);
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adapter->layout->api->read_reg(adapter->handle, 20, ®);
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switch (num) {
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switch (num) {
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case ARMV7M_PRIMASK:
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case ARMV7M_PRIMASK:
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@ -234,7 +234,7 @@ static int adapter_store_core_reg_u32(struct target *target,
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break;
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break;
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}
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}
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adapter->layout->api->write_reg(adapter->fd, 20, reg);
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adapter->layout->api->write_reg(adapter->handle, 20, reg);
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LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
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LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
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break;
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break;
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@ -259,7 +259,7 @@ static int adapter_examine_debug_reason(struct target *target)
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static int hl_dcc_read(struct hl_interface_s *hl_if, uint8_t *value, uint8_t *ctrl)
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static int hl_dcc_read(struct hl_interface_s *hl_if, uint8_t *value, uint8_t *ctrl)
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{
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{
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uint16_t dcrdr;
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uint16_t dcrdr;
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int retval = hl_if->layout->api->read_mem(hl_if->fd,
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int retval = hl_if->layout->api->read_mem(hl_if->handle,
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DCB_DCRDR, 1, sizeof(dcrdr), (uint8_t *)&dcrdr);
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DCB_DCRDR, 1, sizeof(dcrdr), (uint8_t *)&dcrdr);
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if (retval == ERROR_OK) {
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if (retval == ERROR_OK) {
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*ctrl = (uint8_t)dcrdr;
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*ctrl = (uint8_t)dcrdr;
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@ -272,7 +272,7 @@ static int hl_dcc_read(struct hl_interface_s *hl_if, uint8_t *value, uint8_t *ct
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* to signify we have read data */
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* to signify we have read data */
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/* atomically clear just the byte containing the busy bit */
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/* atomically clear just the byte containing the busy bit */
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static const uint8_t zero;
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static const uint8_t zero;
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retval = hl_if->layout->api->write_mem(hl_if->fd, DCB_DCRDR, 1, 1, &zero);
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retval = hl_if->layout->api->write_mem(hl_if->handle, DCB_DCRDR, 1, 1, &zero);
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}
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}
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}
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}
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return retval;
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return retval;
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@ -412,7 +412,7 @@ static int adapter_debug_entry(struct target *target)
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adapter_load_context(target);
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adapter_load_context(target);
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/* make sure we clear the vector catch bit */
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/* make sure we clear the vector catch bit */
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adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
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r = arm->cpsr;
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r = arm->cpsr;
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xPSR = buf_get_u32(r->value, 0, 32);
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xPSR = buf_get_u32(r->value, 0, 32);
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@ -456,7 +456,7 @@ static int adapter_poll(struct target *target)
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struct armv7m_common *armv7m = target_to_armv7m(target);
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struct armv7m_common *armv7m = target_to_armv7m(target);
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enum target_state prev_target_state = target->state;
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enum target_state prev_target_state = target->state;
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state = adapter->layout->api->state(adapter->fd);
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state = adapter->layout->api->state(adapter->handle);
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if (state == TARGET_UNKNOWN) {
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if (state == TARGET_UNKNOWN) {
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LOG_ERROR("jtag status contains invalid mode value - communication failure");
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LOG_ERROR("jtag status contains invalid mode value - communication failure");
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@ -505,22 +505,22 @@ static int adapter_assert_reset(struct target *target)
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if ((jtag_reset_config & RESET_HAS_SRST) &&
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if ((jtag_reset_config & RESET_HAS_SRST) &&
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(jtag_reset_config & RESET_SRST_NO_GATING)) {
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(jtag_reset_config & RESET_SRST_NO_GATING)) {
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jtag_add_reset(0, 1);
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jtag_add_reset(0, 1);
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res = adapter->layout->api->assert_srst(adapter->fd, 0);
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res = adapter->layout->api->assert_srst(adapter->handle, 0);
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srst_asserted = true;
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srst_asserted = true;
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}
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}
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adapter->layout->api->write_debug_reg(adapter->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN);
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DHCSR, DBGKEY|C_DEBUGEN);
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/* only set vector catch if halt is requested */
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/* only set vector catch if halt is requested */
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if (target->reset_halt)
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if (target->reset_halt)
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adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA|VC_CORERESET);
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA|VC_CORERESET);
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else
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else
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adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
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adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
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if (jtag_reset_config & RESET_HAS_SRST) {
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if (jtag_reset_config & RESET_HAS_SRST) {
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if (!srst_asserted) {
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if (!srst_asserted) {
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jtag_add_reset(0, 1);
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jtag_add_reset(0, 1);
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res = adapter->layout->api->assert_srst(adapter->fd, 0);
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res = adapter->layout->api->assert_srst(adapter->handle, 0);
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}
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}
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if (res == ERROR_COMMAND_NOTFOUND)
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if (res == ERROR_COMMAND_NOTFOUND)
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LOG_ERROR("Hardware srst not supported, falling back to software reset");
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LOG_ERROR("Hardware srst not supported, falling back to software reset");
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@ -532,10 +532,10 @@ static int adapter_assert_reset(struct target *target)
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if (use_srst_fallback) {
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if (use_srst_fallback) {
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/* stlink v1 api does not support hardware srst, so we use a software reset fallback */
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/* stlink v1 api does not support hardware srst, so we use a software reset fallback */
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adapter->layout->api->write_debug_reg(adapter->fd, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
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adapter->layout->api->write_debug_reg(adapter->handle, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
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}
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}
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res = adapter->layout->api->reset(adapter->fd);
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res = adapter->layout->api->reset(adapter->handle);
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if (res != ERROR_OK)
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if (res != ERROR_OK)
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return res;
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return res;
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@ -562,7 +562,7 @@ static int adapter_deassert_reset(struct target *target)
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LOG_DEBUG("%s", __func__);
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LOG_DEBUG("%s", __func__);
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if (jtag_reset_config & RESET_HAS_SRST)
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if (jtag_reset_config & RESET_HAS_SRST)
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adapter->layout->api->assert_srst(adapter->fd, 1);
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adapter->layout->api->assert_srst(adapter->handle, 1);
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/* virtual deassert reset, we need it for the internal
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/* virtual deassert reset, we need it for the internal
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* jtag state machine
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* jtag state machine
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@ -589,7 +589,7 @@ static int adapter_halt(struct target *target)
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if (target->state == TARGET_UNKNOWN)
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if (target->state == TARGET_UNKNOWN)
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LOG_WARNING("target was in unknown state when halt was requested");
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LOG_WARNING("target was in unknown state when halt was requested");
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res = adapter->layout->api->halt(adapter->fd);
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res = adapter->layout->api->halt(adapter->handle);
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if (res != ERROR_OK)
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if (res != ERROR_OK)
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return res;
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return res;
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@ -663,7 +663,7 @@ static int adapter_resume(struct target *target, int current,
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breakpoint->unique_id);
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breakpoint->unique_id);
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cortex_m_unset_breakpoint(target, breakpoint);
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cortex_m_unset_breakpoint(target, breakpoint);
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res = adapter->layout->api->step(adapter->fd);
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res = adapter->layout->api->step(adapter->handle);
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if (res != ERROR_OK)
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if (res != ERROR_OK)
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return res;
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return res;
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@ -672,7 +672,7 @@ static int adapter_resume(struct target *target, int current,
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}
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}
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}
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}
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res = adapter->layout->api->run(adapter->fd);
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res = adapter->layout->api->run(adapter->handle);
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if (res != ERROR_OK)
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if (res != ERROR_OK)
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return res;
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return res;
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@ -735,7 +735,7 @@ static int adapter_step(struct target *target, int current,
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target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
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target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
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res = adapter->layout->api->step(adapter->fd);
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res = adapter->layout->api->step(adapter->handle);
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if (res != ERROR_OK)
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if (res != ERROR_OK)
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return res;
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return res;
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@ -765,7 +765,7 @@ static int adapter_read_memory(struct target *target, uint32_t address,
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LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
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LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
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return adapter->layout->api->read_mem(adapter->fd, address, size, count, buffer);
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return adapter->layout->api->read_mem(adapter->handle, address, size, count, buffer);
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}
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}
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static int adapter_write_memory(struct target *target, uint32_t address,
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static int adapter_write_memory(struct target *target, uint32_t address,
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@ -779,7 +779,7 @@ static int adapter_write_memory(struct target *target, uint32_t address,
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LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
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LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
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return adapter->layout->api->write_mem(adapter->fd, address, size, count, buffer);
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return adapter->layout->api->write_mem(adapter->handle, address, size, count, buffer);
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}
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}
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static const struct command_registration adapter_command_handlers[] = {
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static const struct command_registration adapter_command_handlers[] = {
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