tcl/target: ti_tms570.cfg restructure dap support
ti_tms570 was probably omitted in commit
2231da8ec4
Change-Id: Idd4828fd5ea3641bda6c73c7f07a598c1e512ef6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4762
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
log_output
parent
e406f2b0dc
commit
1b864d6e49
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@ -20,8 +20,8 @@ source [find target/icepick.cfg]
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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}
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jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
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jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
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jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
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# ICEpick-C (JTAG route controller)
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# JRC_TAPID should be set before source-ing this file
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@ -50,16 +50,18 @@ jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
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-expected-id $_JRC_TAPID8 \
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-expected-id $_JRC_TAPID9 \
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-ignore-version
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jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
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jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
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jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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# Cortex-R4 target
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_r4 -endian $_ENDIAN \
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-chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x00001003
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-dap $_CHIPNAME.dap -coreid 0 -dbgbase 0x00001003
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# TMS570 uses quirky BE-32 mode
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$_TARGETNAME dap ti_be_32_quirks 1
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$_CHIPNAME.dap ti_be_32_quirks 1
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$_TARGETNAME configure -event gdb-attach {
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cortex_r4 dbginit
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