riscv-compliance: Check that DPC is sign extended properly.
parent
8f7195af76
commit
1b37f60969
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@ -2495,19 +2495,23 @@ int riscv013_test_compliance(struct target *target) {
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riscv_get_register(target, &value, GDB_REGNO_DCSR);
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COMPLIANCE_TEST(value != 0, "At least some bits in DCSR must be 1");
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// DPC
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uint64_t testvar64 = 0xAAAAAAAAAAAAAAAAUL;
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riscv_reg_t dpcmask = 0xFFFFFFFFFFFFFFFFUL;
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riscv_set_register(target, GDB_REGNO_DPC, dpcmask);
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riscv_get_register(target, &dpcmask, GDB_REGNO_DPC);
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COMPLIANCE_TEST(dpcmask >= 0xFFFFFFFC, "DPC must hold the minimum for a virtual address (may tighten requirement later).");
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riscv_set_register(target, GDB_REGNO_DPC, testvar64);
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riscv_get_register(target, &value, GDB_REGNO_DPC);
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COMPLIANCE_TEST((value & dpcmask) == (testvar64 & dpcmask), "DPC must be writable.");
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riscv_set_register(target, GDB_REGNO_DPC, ~testvar64);
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// DPC. Note that DPC is sign-extended.
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riscv_reg_t dpcmask = 0xFFFFFFFCUL;
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riscv_reg_t dpc;
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if (riscv_xlen(target) > 32) {
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dpcmask |= (0xFFFFFFFFUL << 32);
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}
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if (riscv_supports_extension(target, 'C')){
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dpcmask |= 0x2;
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}
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riscv_set_register(target, GDB_REGNO_DPC, dpcmask);
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riscv_get_register(target, &dpc, GDB_REGNO_DPC);
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COMPLIANCE_TEST((dpc & dpcmask) == ((~testvar64) & dpcmask), "DPC must be writable");
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COMPLIANCE_TEST(dpcmask == dpc, "DPC must be sign-extended to XLEN and writable to all-1s (except the least significant bits)");
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riscv_set_register(target, GDB_REGNO_DPC, 0);
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riscv_get_register(target, &dpc, GDB_REGNO_DPC);
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COMPLIANCE_TEST(dpc == 0, "DPC must be writable to 0.");
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if (hartsel == 0) {bogus_dpc = dpc;} // For a later test step
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}
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