armv7m: update crc/erase_check loaders for cortex-m0
Use loaders that have been built for cortex-m0, making them usable for both cortex-m0 and cortex-m3 families. Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/604 Tested-by: jenkins__archive__
Spencer Oliver
parent
4257cb728c
commit
1b0c22dd56
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@ -26,41 +26,46 @@
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.text
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.syntax unified
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.arch armv7-m
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.cpu cortex-m0
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.thumb
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.thumb_func
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.align 2
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_start:
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main:
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main:
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mov r2, r0
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mov r0, #0xffffffff /* crc */
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movs r0, #0
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mvns r0, r0
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ldr r6, CRC32XOR
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mov r3, r1
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mov r4, #0
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movs r4, #0
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b ncomp
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nbyte:
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ldrb r1, [r2, r4]
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ldr r7, CRC32XOR
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eor r0, r0, r1, asl #24
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mov r5, #0
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lsls r1, r1, #24
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eors r0, r0, r1
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movs r5, #0
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loop:
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cmp r0, #0
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mov r6, r0, asl #1
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add r5, r5, #1
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mov r0, r6
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it lt
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eorlt r0, r6, r7
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bge notset
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lsls r0, r0, #1
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eors r0, r0, r6
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b cont
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notset:
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lsls r0, r0, #1
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cont:
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adds r5, r5, #1
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cmp r5, #8
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bne loop
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add r4, r4, #1
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adds r4, r4, #1
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ncomp:
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cmp r4, r3
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bne nbyte
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bkpt #0
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.align 2
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CRC32XOR: .word 0x04c11db7
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.end
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@ -602,52 +602,50 @@ int armv7m_checksum_memory(struct target *target,
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struct reg_param reg_params[2];
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int retval;
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/* see contib/loaders/checksum/armv7m_crc.s for src */
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/* see contrib/loaders/checksum/armv7m_crc.s for src */
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static const uint16_t cortex_m3_crc_code[] = {
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0x4602, /* mov r2, r0 */
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0xF04F, 0x30FF, /* mov r0, #0xffffffff */
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0x460B, /* mov r3, r1 */
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0xF04F, 0x0400, /* mov r4, #0 */
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0xE013, /* b ncomp */
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static const uint8_t cortex_m3_crc_code[] = {
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/* main: */
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0x02, 0x46, /* mov r2, r0 */
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0x00, 0x20, /* movs r0, #0 */
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0xC0, 0x43, /* mvns r0, r0 */
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0x0A, 0x4E, /* ldr r6, CRC32XOR */
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0x0B, 0x46, /* mov r3, r1 */
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0x00, 0x24, /* movs r4, #0 */
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0x0D, 0xE0, /* b ncomp */
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/* nbyte: */
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0x5D11, /* ldrb r1, [r2, r4] */
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0xF8DF, 0x7028, /* ldr r7, CRC32XOR */
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0xEA80, 0x6001, /* eor r0, r0, r1, asl #24 */
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0xF04F, 0x0500, /* mov r5, #0 */
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0x11, 0x5D, /* ldrb r1, [r2, r4] */
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0x09, 0x06, /* lsls r1, r1, #24 */
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0x48, 0x40, /* eors r0, r0, r1 */
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0x00, 0x25, /* movs r5, #0 */
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/* loop: */
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0x2800, /* cmp r0, #0 */
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0xEA4F, 0x0640, /* mov r6, r0, asl #1 */
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0xF105, 0x0501, /* add r5, r5, #1 */
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0x4630, /* mov r0, r6 */
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0xBFB8, /* it lt */
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0xEA86, 0x0007, /* eor r0, r6, r7 */
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0x2D08, /* cmp r5, #8 */
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0xD1F4, /* bne loop */
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0xF104, 0x0401, /* add r4, r4, #1 */
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0x00, 0x28, /* cmp r0, #0 */
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0x02, 0xDA, /* bge notset */
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0x40, 0x00, /* lsls r0, r0, #1 */
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0x70, 0x40, /* eors r0, r0, r6 */
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0x00, 0xE0, /* b cont */
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/* notset: */
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0x40, 0x00, /* lsls r0, r0, #1 */
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/* cont: */
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0x01, 0x35, /* adds r5, r5, #1 */
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0x08, 0x2D, /* cmp r5, #8 */
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0xF6, 0xD1, /* bne loop */
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0x01, 0x34, /* adds r4, r4, #1 */
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/* ncomp: */
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0x429C, /* cmp r4, r3 */
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0xD1E9, /* bne nbyte */
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0xBE00, /* bkpt #0 */
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0x1DB7, 0x04C1 /* CRC32XOR: .word 0x04C11DB7 */
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0x9C, 0x42, /* cmp r4, r3 */
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0xEF, 0xD1, /* bne nbyte */
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0x00, 0xBE, /* bkpt #0 */
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0xB7, 0x1D, 0xC1, 0x04 /* CRC32XOR: .word 0x04c11db7 */
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};
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uint32_t i;
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retval = target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm);
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if (retval != ERROR_OK)
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return retval;
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/* convert flash writing code into a buffer in target endianness */
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for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) {
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retval = target_write_u16(target,
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crc_algorithm->address + i*sizeof(uint16_t),
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cortex_m3_crc_code[i]);
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if (retval != ERROR_OK)
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goto cleanup;
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}
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retval = target_write_buffer(target, crc_algorithm->address,
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sizeof(cortex_m3_crc_code), (uint8_t *)cortex_m3_crc_code);
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if (retval != ERROR_OK)
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goto cleanup;
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARMV7M_MODE_ANY;
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@ -686,15 +684,17 @@ int armv7m_blank_check_memory(struct target *target,
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struct reg_param reg_params[3];
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struct armv7m_algorithm armv7m_info;
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int retval;
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uint32_t i;
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static const uint16_t erase_check_code[] = {
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/* see contrib/loaders/erase_check/armv7m_erase_check.s for src */
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static const uint8_t erase_check_code[] = {
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/* loop: */
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0xF810, 0x3B01, /* ldrb r3, [r0], #1 */
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0xEA02, 0x0203, /* and r2, r2, r3 */
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0x3901, /* subs r1, r1, #1 */
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0xD1F9, /* bne loop */
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0xBE00, /* bkpt #0 */
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0x03, 0x78, /* ldrb r3, [r0] */
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0x01, 0x30, /* adds r0, #1 */
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0x1A, 0x40, /* ands r2, r2, r3 */
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0x01, 0x39, /* subs r1, r1, #1 */
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0xFA, 0xD1, /* bne loop */
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0x00, 0xBE /* bkpt #0 */
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};
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/* make sure we have a working area */
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@ -702,11 +702,10 @@ int armv7m_blank_check_memory(struct target *target,
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&erase_check_algorithm) != ERROR_OK)
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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/* convert flash writing code into a buffer in target endianness */
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for (i = 0; i < ARRAY_SIZE(erase_check_code); i++)
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target_write_u16(target,
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erase_check_algorithm->address + i*sizeof(uint16_t),
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erase_check_code[i]);
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retval = target_write_buffer(target, erase_check_algorithm->address,
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sizeof(erase_check_code), (uint8_t *)erase_check_code);
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if (retval != ERROR_OK)
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return retval;
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARMV7M_MODE_ANY;
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