David Brownell <david-b@pacbell.net>:

Add another board ... OMAP2420 "H4" board.  This won't be very widely
used with OpenOCD, but with mainline support in both U-Boot and Linux
it at least makes for a more complete set (and another testcase).

This is incomplete support in several respects.  The ARM11 support is
not very deep yet; most registers aren't available, and the ETM can't
be hooked up.  Plus, there's no script for OMAP-specific stuff like
setting up the SDRAM controller.  Eventually the same NAND controller
driver should work with OMAP2 and OMAP3.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2242 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
zwelch 2009-06-15 23:54:09 +00:00
parent 588a17da43
commit 1ac220df71
2 changed files with 75 additions and 0 deletions

14
tcl/board/omap2420_h4.cfg Normal file
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# OMAP2420 SDP board ("H4")
source [find target/omap2420.cfg]
# NOTE: this assumes you're *NOT* using a TI-14 connector.
reset_config trst_and_srst separate
# Board configs can vary a *LOT* ... parts, jumpers, etc.
# This GP board boots from cs0 using NOR (2x32M), and also
# has 64M NAND on cs6.
flash bank cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
flash bank cfi 0x06000000 0x02000000 2 2 $_TARGETNAME
# vim:syntax tcl

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tcl/target/omap2420.cfg Normal file
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# Texas Instruments OMAP 2420
# http://www.ti.com/omap
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME omap2420
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
# NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK
# Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6).
jtag newtap $_CHIPNAME iva -irlen 4 -ircapture 0x1 -irmask 0x3f -disable
# Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2).
jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x1 -irmask 0x3f -disable
# Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
if { [info exists ETB_TAPID ] } {
set _ETB_TAPID $ETB_TAPID
} else {
set _ETB_TAPID 0x2b900f0f
}
jtag newtap $_CHIPNAME etb -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_ETB_TAPID
# Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
if { [info exists CPU_TAPID ] } {
set _CPU_TAPID $CPU_TAPID
} else {
set _CPU_TAPID 0x07b3602f
}
jtag newtap $_CHIPNAME arm -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPU_TAPID
# Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
if { [info exists JRC_TAPID ] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x01ce4801
}
jtag newtap $_CHIPNAME jrc -irlen 2 -ircapture 0x1 -irmask 0x3 -expected-id $_JRC_TAPID
# GDB target: the ARM.
set _TARGETNAME $_CHIPNAME.arm
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
# scratch: framebuffer, may be initially unavailable in some chips
$_TARGETNAME configure -work-area-phys 0x40210000
$_TARGETNAME configure -work-area-size 0x00081000
$_TARGETNAME configure -work-area-backup 0
# trace setup
# REVISIT ... as of 12-June-2009, OpenOCD's ETM code can't talk to ARM11 cores.
#etm config $_TARGETNAME 16 normal full etb
#etb config $_TARGETNAME $_CHIPNAME.etb
# vim:syntax tcl