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AT91R40008/Ethernut 3 configuration 

Moved board specific settings from target/at91r40008.cfg to a new
file board/ethernut3.cfg.

Set correct CPUTAPID.  Reset delay increased, see MIC2775 data sheet.
Increased work area size from 16k to 128k.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
__archive__
Harald Kipp 2010-02-02 11:09:53 -08:00 committed by David Brownell
parent 5750e899e0
commit 18969466c9
2 changed files with 95 additions and 32 deletions
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86
tcl/board/ethernut3.cfg Normal file
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@ -0,0 +1,86 @@
#
# Ethernut 3 board configuration file
#
# http://www.ethernut.de/en/hardware/enut3/
# AT91R40008-66AU ARM7TDMI Microcontroller
# 256kB internal RAM
source [find target/at91r40008.cfg]
# AT49BV322A-70TU NOR Flash
# 2M x 16 mode at address 0x10000000
# Common flash interface supported
#
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# Micrel MIC2775-29YM5 Supervisor
# Reset output will remain active for 280ms (maximum)
#
jtag_nsrst_delay 300
jtag_ntrst_delay 300
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
jtag_khz 16000
# Target events
#
$_TARGETNAME configure -event reset-init { board_init }
# Initialize board hardware
#
proc board_init { } {
board_remap
flash probe 0
}
# Memory remap
#
proc board_remap {{VERBOSE 0}} {
# CS0: NOR flash
# 16MB @ 0x10000000
# 16-bit data bus
# 4 wait states
#
mww 0xffe00000 0x1000212d
# CS1: Ethernet controller
# 1MB @ 0x20000000
# 16-bit data bus
# 2 wait states
# Byte select access
#
mww 0xffe00004 0x20003025
# CS2: CPLD registers
# 1MB @ 0x21000000
# 8-bit data bus
# 2 wait states
#
mww 0xffe00008 0x21002026
# CS3: Expansion bus
# 1MB @ 0x22000000
# 8-bit data bus
# 8 wait states
#
mww 0xffe00010 0x22002e3e
# Remap command
#
mww 0xffe00020 0x00000001
if {$VERBOSE != 0} {
puts "0x00000000 RAM"
puts "0x10000000 Flash"
puts "0x20000000 Ethernet"
puts "0x21000000 CPLD"
puts "0x22000000 Expansion"
}
}

41
tcl/target/at91r40008.cfg
View File

@ -1,9 +1,13 @@
# AT91R40008 target configuration file
# TRST is tied to SRST on the AT91X40 family.
reset_config srst_only srst_pulls_trst
if { [info exists CHIPNAME] } {
if {[info exists CHIPNAME]} {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME at9r40008
set _CHIPNAME at91r40008
}
if { [info exists ENDIAN] } {
@ -12,41 +16,14 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
# Setup the JTAG scan chain.
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0xffffffff
set _CPUTAPID 0x1f0f0f0f
}
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
$_TARGETNAME configure -event gdb-flash-erase-start {
wait_halt
sleep 10
poll
# Ethernut 3 remapping is required to access external flash memory.
mww 0xffe00000 0x1000213d
mww 0xffe00004 0x20003e3d
mww 0xffe00020 0x00000001
}
$_TARGETNAME configure -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# For more information about the configuration files, take a look at:
# openocd.texi
$_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0