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It is not possible to invalidate I-Cache on memory writes while the target is running 

git-svn-id: svn://svn.berlios.de/openocd/trunk@2795 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
mlu 2009-10-02 16:50:42 +00:00
parent 49f3497bfa
commit 16742b529b
1 changed files with 3 additions and 0 deletions
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3
src/target/cortex_a8.c
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@ -1332,6 +1332,8 @@ int cortex_a8_write_memory(struct target_s *target, uint32_t address,
exit(-1); exit(-1);
} }
if (target->state == TARGET_HALTED)
{
/* The Cache handling will NOT work with MMU active, the wrong addresses will be invalidated */ /* The Cache handling will NOT work with MMU active, the wrong addresses will be invalidated */
/* invalidate I-Cache */ /* invalidate I-Cache */
if (armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled) if (armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled)
@ -1349,6 +1351,7 @@ int cortex_a8_write_memory(struct target_s *target, uint32_t address,
for (uint32_t cacheline=address; cacheline<address+size*count; cacheline+=64) for (uint32_t cacheline=address; cacheline<address+size*count; cacheline+=64)
armv7a->write_cp15(target, 0, 1, 7, 6, cacheline); /* U/D cache to PoC */ armv7a->write_cp15(target, 0, 1, 7, 6, cacheline); /* U/D cache to PoC */
} }
}
return retval; return retval;
} }