zy1000: revc FPGA now works
remove kludge code. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>__archive__
parent
29a8cdc3b0
commit
134df4b701
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@ -32,33 +32,9 @@ int diag_printf(const char *fmt, ...);
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#define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b); diag_printf("peek 0x%08x = 0x%08x\n", a, b)
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#else
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#define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b)
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#ifdef CYGPKG_HAL_NIOS2
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#define ZY1000_POKE(a, b) \
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{/* This will flush the bridge FIFO. Overflowed bridge FIFO fails. We must \
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flush every "often". No precise system has been found, but 4 seems solid. \
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This code goes away once the FPGA has been fixed. */ \
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\
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CYG_INTERRUPT_STATE _old_; \
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HAL_DISABLE_INTERRUPTS(_old_); \
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HAL_WRITE_UINT32(a, b);\
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static int overflow_counter = 0; \
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if (++overflow_counter >= 1) \
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{ \
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/* clear FIFO */ \
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cyg_uint32 empty; ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty); \
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overflow_counter = 0; \
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} \
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/* NB! interrupts must be restored *after* read */ \
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HAL_RESTORE_INTERRUPTS(_old_); \
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}\
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#else
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#define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b)
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#endif
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#endif
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// FIFO empty?
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static __inline__ void waitIdle(void)
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{
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@ -93,8 +93,8 @@ static bool readPowerDropout(void)
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{
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cyg_uint32 state;
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// sample and clear power dropout
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HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x10, 0x80);
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HAL_READ_UINT32(ZY1000_JTAG_BASE + 0x10, state);
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ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
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ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
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bool powerDropout;
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powerDropout = (state & 0x80) != 0;
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return powerDropout;
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@ -105,8 +105,8 @@ static bool readSRST(void)
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{
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cyg_uint32 state;
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// sample and clear SRST sensing
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HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x10, 0x00000040);
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HAL_READ_UINT32(ZY1000_JTAG_BASE + 0x10, state);
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ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
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ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
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bool srstAsserted;
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srstAsserted = (state & 0x40) != 0;
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return srstAsserted;
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@ -218,10 +218,10 @@ static void setPower(bool power)
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savePower = power;
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if (power)
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{
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HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x14, 0x8);
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ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
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} else
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{
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HAL_WRITE_UINT32(ZY1000_JTAG_BASE + 0x10, 0x8);
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ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
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}
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}
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