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tinyriscv-openocd
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- Fixes '&&' whitespace 

- Replace ')\(&&\)(' with ') \1 ('.
- Replace '\(\w\)\(&&\)(' with '\1 \2 ('.
- Replace '\(\w\)\(&&\)\(\w\)' with '\1 \2 \3'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2366 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
zwelch 2009-06-23 22:39:47 +00:00
parent 319fdecb76
commit 128a733428
11 changed files with 23 additions and 23 deletions
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2
src/flash/at91sam7.c
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@ -284,7 +284,7 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16
target_write_u32(target, MC_FCR[bank->bank_number], fcr); target_write_u32(target, MC_FCR[bank->bank_number], fcr);
LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen); LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen);
if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB))) if ((at91sam7_info->cidr_arch == 0x60) && ((cmd==SLB)|(cmd==CLB)))
{ {
/* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */ /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C) if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)

4
src/helper/binarybuffer.h
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@ -32,7 +32,7 @@
/* inlining this will help show what fn that is taking time during profiling. */ /* inlining this will help show what fn that is taking time during profiling. */
static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value) static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value)
{ {
if ((num==32)&&(first==0)) if ((num==32) && (first==0))
{ {
buffer[3]=(value>>24)&0xff; buffer[3]=(value>>24)&0xff;
buffer[2]=(value>>16)&0xff; buffer[2]=(value>>16)&0xff;
@ -53,7 +53,7 @@ static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int
} }
static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num) static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
{ {
if ((num==32)&&(first==0)) if ((num==32) && (first==0))
{ {
return (((uint32_t)buffer[3])<<24)|(((uint32_t)buffer[2])<<16)|(((uint32_t)buffer[1])<<8)|(((uint32_t)buffer[0])<<0); return (((uint32_t)buffer[3])<<24)|(((uint32_t)buffer[2])<<16)|(((uint32_t)buffer[1])<<8)|(((uint32_t)buffer[0])<<0);
} else } else

4
src/helper/ioutil.c
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@ -233,7 +233,7 @@ int handle_append_command(struct command_context_s *cmd_ctx, char *cmd,
break; break;
} }
} }
if ((i==argc)&&(fwrite("\n", 1, 1, config_file)==1)) if ((i==argc) && (fwrite("\n", 1, 1, config_file)==1))
{ {
retval=ERROR_OK; retval=ERROR_OK;
} }
@ -274,7 +274,7 @@ int handle_cp_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
chunk = maxChunk; chunk = maxChunk;
} }
if ((retval==ERROR_OK)&&(fwrite(((char *)data)+pos, 1, chunk, f) != chunk)) if ((retval==ERROR_OK) && (fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
retval = ERROR_INVALID_ARGUMENTS; retval = ERROR_INVALID_ARGUMENTS;
if (retval != ERROR_OK) if (retval != ERROR_OK)

6
src/jtag/core.c
View File

@ -324,7 +324,7 @@ void jtag_add_ir_scan_noverify(int in_count, const scan_field_t *in_fields,
void jtag_add_ir_scan(int in_num_fields, scan_field_t *in_fields, tap_state_t state) void jtag_add_ir_scan(int in_num_fields, scan_field_t *in_fields, tap_state_t state)
{ {
if (jtag_verify&&jtag_verify_capture_ir) if (jtag_verify && jtag_verify_capture_ir)
{ {
/* 8 x 32 bit id's is enough for all invocations */ /* 8 x 32 bit id's is enough for all invocations */
@ -579,9 +579,9 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)) ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
{ {
if (((req_tlr_or_trst&&!jtag_trst)|| if (((req_tlr_or_trst&&!jtag_trst)||
(!req_tlr_or_trst&&jtag_trst))&& (!req_tlr_or_trst && jtag_trst))&&
((req_srst&&!jtag_srst)|| ((req_srst&&!jtag_srst)||
(!req_srst&&jtag_srst))) (!req_srst && jtag_srst)))
{ {
/* FIX!!! srst_pulls_trst allows 1,1 => 0,0 transition.... */ /* FIX!!! srst_pulls_trst allows 1,1 => 0,0 transition.... */
//LOG_ERROR("BUG: transition of req_tlr_or_trst and req_srst in the same jtag_add_reset() call is undefined"); //LOG_ERROR("BUG: transition of req_tlr_or_trst and req_srst in the same jtag_add_reset() call is undefined");

10
src/jtag/zy1000/jtag_minidriver.h
View File

@ -92,7 +92,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value); ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value);
#if 1 #if 1
#if TEST_MANUAL() #if TEST_MANUAL()
if ((state==TAP_DRSHIFT)&&(endState != TAP_DRSHIFT)) if ((state==TAP_DRSHIFT) && (endState != TAP_DRSHIFT))
{ {
int i; int i;
setCurrentState(state); setCurrentState(state);
@ -100,7 +100,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
{ {
int tms; int tms;
tms=0; tms=0;
if ((i==repeat-1)&&(state != endState)) if ((i==repeat-1) && (state != endState))
{ {
tms=1; tms=1;
} }
@ -124,7 +124,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
#endif #endif
#else #else
/* maximum debug version */ /* maximum debug version */
if ((repeat>0)&&((state==TAP_DRSHIFT)||(state==TAP_SI))) if ((repeat>0) && ((state==TAP_DRSHIFT)||(state==TAP_SI)))
{ {
int i; int i;
/* sample shift register for every bit. */ /* sample shift register for every bit. */
@ -188,13 +188,13 @@ static __inline__ void interface_jtag_add_dr_out(jtag_tap_t *target_tap,
{ {
int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL); int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL);
if ((singletap)&&(num_fields==3)) if ((singletap) && (num_fields==3))
{ {
/* used by embeddedice_write_reg_inner() */ /* used by embeddedice_write_reg_inner() */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]); shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[1], value[1]); shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[1], value[1]);
shiftValueInner(TAP_DRSHIFT, end_state, num_bits[2], value[2]); shiftValueInner(TAP_DRSHIFT, end_state, num_bits[2], value[2]);
} else if ((singletap)&&(num_fields==2)) } else if ((singletap) && (num_fields==2))
{ {
/* used by arm7 code */ /* used by arm7 code */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]); shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);

2
src/jtag/zy1000/zy1000.c
View File

@ -149,7 +149,7 @@ void zy1000_reset(int trst, int srst)
ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000002); ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000002);
} }
if (trst||(srst&&(jtag_get_reset_config() & RESET_SRST_PULLS_TRST))) if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
{ {
waitIdle(); waitIdle();
/* we're now in the RESET state until trst is deasserted */ /* we're now in the RESET state until trst is deasserted */

6
src/server/gdb_server.c
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@ -1397,7 +1397,7 @@ int gdb_breakpoint_watchpoint_packet(connection_t *connection, target_t *target,
else if (type == 4) /* access watchpoint */ else if (type == 4) /* access watchpoint */
wp_type = WPT_ACCESS; wp_type = WPT_ACCESS;
if (gdb_breakpoint_override&&((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD))) if (gdb_breakpoint_override && ((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD)))
{ {
bp_type=gdb_breakpoint_override_type; bp_type=gdb_breakpoint_override_type;
} }
@ -1654,7 +1654,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i
xml_printf(&retval, &buffer, &pos, &size, xml_printf(&retval, &buffer, &pos, &size,
"PacketSize=%x;qXfer:memory-map:read%c;qXfer:features:read-;QStartNoAckMode+", "PacketSize=%x;qXfer:memory-map:read%c;qXfer:features:read-;QStartNoAckMode+",
(GDB_BUFFER_SIZE - 1), ((gdb_use_memory_map == 1)&&(flash_get_bank_count()>0)) ? '+' : '-'); (GDB_BUFFER_SIZE - 1), ((gdb_use_memory_map == 1) && (flash_get_bank_count()>0)) ? '+' : '-');
if (retval != ERROR_OK) if (retval != ERROR_OK)
{ {
@ -1667,7 +1667,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i
return ERROR_OK; return ERROR_OK;
} }
else if (strstr(packet, "qXfer:memory-map:read::")&&(flash_get_bank_count()>0)) else if (strstr(packet, "qXfer:memory-map:read::") && (flash_get_bank_count()>0))
{ {
/* We get away with only specifying flash here. Regions that are not /* We get away with only specifying flash here. Regions that are not
* specified are treated as if we provided no memory map(if not we * specified are treated as if we provided no memory map(if not we

4
src/target/arm7_9_common.c
View File

@ -1022,7 +1022,7 @@ int arm7_9_assert_reset(target_t *target)
armv4_5_invalidate_core_regs(target); armv4_5_invalidate_core_regs(target);
if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)) if ((target->reset_halt) && ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
{ {
/* debug entry was already prepared in arm7_9_assert_reset() */ /* debug entry was already prepared in arm7_9_assert_reset() */
target->debug_reason = DBG_REASON_DBGRQ; target->debug_reason = DBG_REASON_DBGRQ;
@ -1050,7 +1050,7 @@ int arm7_9_deassert_reset(target_t *target)
jtag_add_reset(0, 0); jtag_add_reset(0, 0);
enum reset_types jtag_reset_config = jtag_get_reset_config(); enum reset_types jtag_reset_config = jtag_get_reset_config();
if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST) != 0) if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
{ {
LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset."); LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
/* set up embedded ice registers again */ /* set up embedded ice registers again */

4
src/target/arm_adi_v5.c
View File

@ -1027,7 +1027,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
dap_ap_read_reg_u32(swjdp, 0xFC, &apid); dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
swjdp_transaction_endcheck(swjdp); swjdp_transaction_endcheck(swjdp);
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */ /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
mem_ap = ((apid&0x10000)&&((apid&0x0F) != 0)); mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid); command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
if (apid) if (apid)
{ {
@ -1053,7 +1053,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel); command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
} }
romtable_present = ((mem_ap)&&(dbgbase != 0xFFFFFFFF)); romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
if (romtable_present) if (romtable_present)
{ {
uint32_t cid0,cid1,cid2,cid3,memtype,romentry; uint32_t cid0,cid1,cid2,cid3,memtype,romentry;

2
src/target/image.c
View File

@ -81,7 +81,7 @@ static int autodetect_image_type(image_t *image, char *url)
&&(isxdigit(buffer[5])) &&(isxdigit(buffer[5]))
&&(isxdigit(buffer[6])) &&(isxdigit(buffer[6]))
&&(buffer[7]=='0') /* record type : 00 -> 05 */ &&(buffer[7]=='0') /* record type : 00 -> 05 */
&&(buffer[8]>='0')&&(buffer[8]<'6')) &&(buffer[8]>='0') && (buffer[8]<'6'))
{ {
LOG_DEBUG("IHEX image detected."); LOG_DEBUG("IHEX image detected.");
image->type = IMAGE_IHEX; image->type = IMAGE_IHEX;

2
src/target/target.c
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@ -1014,7 +1014,7 @@ int target_free_working_area_restore(struct target_s *target, working_area_t *ar
if (area->free) if (area->free)
return ERROR_OK; return ERROR_OK;
if (restore&&target->backup_working_area) if (restore && target->backup_working_area)
{ {
int retval; int retval;
if ((retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup)) != ERROR_OK) if ((retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup)) != ERROR_OK)