- Fixes '&&' whitespace
- Replace ')\(&&\)(' with ') \1 ('. - Replace '\(\w\)\(&&\)(' with '\1 \2 ('. - Replace '\(\w\)\(&&\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2366 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
parent
319fdecb76
commit
128a733428
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@ -284,7 +284,7 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16
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target_write_u32(target, MC_FCR[bank->bank_number], fcr);
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LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen);
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if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB)))
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if ((at91sam7_info->cidr_arch == 0x60) && ((cmd==SLB)|(cmd==CLB)))
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{
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/* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
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if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
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@ -32,7 +32,7 @@
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/* inlining this will help show what fn that is taking time during profiling. */
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static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value)
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{
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if ((num==32)&&(first==0))
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if ((num==32) && (first==0))
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{
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buffer[3]=(value>>24)&0xff;
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buffer[2]=(value>>16)&0xff;
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@ -53,7 +53,7 @@ static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int
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}
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static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
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{
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if ((num==32)&&(first==0))
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if ((num==32) && (first==0))
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{
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return (((uint32_t)buffer[3])<<24)|(((uint32_t)buffer[2])<<16)|(((uint32_t)buffer[1])<<8)|(((uint32_t)buffer[0])<<0);
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} else
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@ -233,7 +233,7 @@ int handle_append_command(struct command_context_s *cmd_ctx, char *cmd,
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break;
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}
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}
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if ((i==argc)&&(fwrite("\n", 1, 1, config_file)==1))
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if ((i==argc) && (fwrite("\n", 1, 1, config_file)==1))
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{
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retval=ERROR_OK;
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}
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@ -274,7 +274,7 @@ int handle_cp_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
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chunk = maxChunk;
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}
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if ((retval==ERROR_OK)&&(fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
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if ((retval==ERROR_OK) && (fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
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retval = ERROR_INVALID_ARGUMENTS;
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if (retval != ERROR_OK)
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@ -324,7 +324,7 @@ void jtag_add_ir_scan_noverify(int in_count, const scan_field_t *in_fields,
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void jtag_add_ir_scan(int in_num_fields, scan_field_t *in_fields, tap_state_t state)
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{
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if (jtag_verify&&jtag_verify_capture_ir)
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if (jtag_verify && jtag_verify_capture_ir)
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{
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/* 8 x 32 bit id's is enough for all invocations */
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@ -579,9 +579,9 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
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((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
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{
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if (((req_tlr_or_trst&&!jtag_trst)||
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(!req_tlr_or_trst&&jtag_trst))&&
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(!req_tlr_or_trst && jtag_trst))&&
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((req_srst&&!jtag_srst)||
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(!req_srst&&jtag_srst)))
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(!req_srst && jtag_srst)))
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{
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/* FIX!!! srst_pulls_trst allows 1,1 => 0,0 transition.... */
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//LOG_ERROR("BUG: transition of req_tlr_or_trst and req_srst in the same jtag_add_reset() call is undefined");
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@ -92,7 +92,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
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ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value);
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#if 1
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#if TEST_MANUAL()
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if ((state==TAP_DRSHIFT)&&(endState != TAP_DRSHIFT))
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if ((state==TAP_DRSHIFT) && (endState != TAP_DRSHIFT))
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{
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int i;
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setCurrentState(state);
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@ -100,7 +100,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
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{
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int tms;
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tms=0;
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if ((i==repeat-1)&&(state != endState))
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if ((i==repeat-1) && (state != endState))
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{
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tms=1;
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}
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@ -124,7 +124,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
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#endif
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#else
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/* maximum debug version */
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if ((repeat>0)&&((state==TAP_DRSHIFT)||(state==TAP_SI)))
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if ((repeat>0) && ((state==TAP_DRSHIFT)||(state==TAP_SI)))
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{
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int i;
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/* sample shift register for every bit. */
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@ -188,13 +188,13 @@ static __inline__ void interface_jtag_add_dr_out(jtag_tap_t *target_tap,
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{
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int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL);
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if ((singletap)&&(num_fields==3))
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if ((singletap) && (num_fields==3))
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{
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/* used by embeddedice_write_reg_inner() */
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[1], value[1]);
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shiftValueInner(TAP_DRSHIFT, end_state, num_bits[2], value[2]);
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} else if ((singletap)&&(num_fields==2))
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} else if ((singletap) && (num_fields==2))
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{
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/* used by arm7 code */
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
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@ -149,7 +149,7 @@ void zy1000_reset(int trst, int srst)
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ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000002);
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}
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if (trst||(srst&&(jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
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if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
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{
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waitIdle();
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/* we're now in the RESET state until trst is deasserted */
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@ -1397,7 +1397,7 @@ int gdb_breakpoint_watchpoint_packet(connection_t *connection, target_t *target,
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else if (type == 4) /* access watchpoint */
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wp_type = WPT_ACCESS;
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if (gdb_breakpoint_override&&((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD)))
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if (gdb_breakpoint_override && ((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD)))
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{
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bp_type=gdb_breakpoint_override_type;
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}
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@ -1654,7 +1654,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i
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xml_printf(&retval, &buffer, &pos, &size,
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"PacketSize=%x;qXfer:memory-map:read%c;qXfer:features:read-;QStartNoAckMode+",
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(GDB_BUFFER_SIZE - 1), ((gdb_use_memory_map == 1)&&(flash_get_bank_count()>0)) ? '+' : '-');
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(GDB_BUFFER_SIZE - 1), ((gdb_use_memory_map == 1) && (flash_get_bank_count()>0)) ? '+' : '-');
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if (retval != ERROR_OK)
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{
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@ -1667,7 +1667,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i
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return ERROR_OK;
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}
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else if (strstr(packet, "qXfer:memory-map:read::")&&(flash_get_bank_count()>0))
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else if (strstr(packet, "qXfer:memory-map:read::") && (flash_get_bank_count()>0))
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{
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/* We get away with only specifying flash here. Regions that are not
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* specified are treated as if we provided no memory map(if not we
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@ -1022,7 +1022,7 @@ int arm7_9_assert_reset(target_t *target)
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armv4_5_invalidate_core_regs(target);
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if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
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if ((target->reset_halt) && ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
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{
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/* debug entry was already prepared in arm7_9_assert_reset() */
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target->debug_reason = DBG_REASON_DBGRQ;
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@ -1050,7 +1050,7 @@ int arm7_9_deassert_reset(target_t *target)
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jtag_add_reset(0, 0);
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enum reset_types jtag_reset_config = jtag_get_reset_config();
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if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
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if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
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{
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LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
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/* set up embedded ice registers again */
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@ -1027,7 +1027,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
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dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
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swjdp_transaction_endcheck(swjdp);
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/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
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mem_ap = ((apid&0x10000)&&((apid&0x0F) != 0));
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mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
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command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
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if (apid)
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{
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@ -1053,7 +1053,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
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command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
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}
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romtable_present = ((mem_ap)&&(dbgbase != 0xFFFFFFFF));
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romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
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if (romtable_present)
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{
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uint32_t cid0,cid1,cid2,cid3,memtype,romentry;
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@ -81,7 +81,7 @@ static int autodetect_image_type(image_t *image, char *url)
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&&(isxdigit(buffer[5]))
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&&(isxdigit(buffer[6]))
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&&(buffer[7]=='0') /* record type : 00 -> 05 */
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&&(buffer[8]>='0')&&(buffer[8]<'6'))
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&&(buffer[8]>='0') && (buffer[8]<'6'))
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{
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LOG_DEBUG("IHEX image detected.");
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image->type = IMAGE_IHEX;
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@ -1014,7 +1014,7 @@ int target_free_working_area_restore(struct target_s *target, working_area_t *ar
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if (area->free)
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return ERROR_OK;
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if (restore&&target->backup_working_area)
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if (restore && target->backup_working_area)
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{
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int retval;
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if ((retval = target_write_memory(target, area->address, 4, area->size / 4, area->backup)) != ERROR_OK)
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Reference in New Issue