diff --git a/tcl/target/at91sam3XXX.cfg b/tcl/target/at91sam3XXX.cfg index 075b462d0..f36475b6d 100644 --- a/tcl/target/at91sam3XXX.cfg +++ b/tcl/target/at91sam3XXX.cfg @@ -24,6 +24,9 @@ # at91sam3X8C # at91sam3X8E # at91sam3X8H + +source [find target/swj-dp.tcl] + if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { @@ -36,6 +39,33 @@ if { [info exists ENDIAN] } { set _ENDIAN little } +# Work-area is a space in RAM used for flash programming +# By default use 64kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +#jtag scan chain +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +# 16K is plenty, the smallest chip has this much +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +$_TARGETNAME configure -event gdb-flash-erase-start { + halt +} + # JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz # # Since we may be running of an RC oscilator, we crank down the speed a @@ -46,25 +76,8 @@ if { [info exists ENDIAN] } { adapter_khz 500 adapter_nsrst_delay 100 -jtag_ntrst_delay 100 - -#jtag scan chain -if { [info exists CPUTAPID] } { - set _CPUTAPID $CPUTAPID -} else { - set _CPUTAPID 0x4ba00477 -} - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME - -# 16K is plenty, the smallest chip has this much -$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 - -$_TARGETNAME configure -event gdb-flash-erase-start { - halt +if {$using_jtag} { + jtag_ntrst_delay 100 } # if srst is not fitted use SYSRESETREQ to