David Brownell <david-b@pacbell.net>:
This should be my last significant update of the User's Guide for this release. Mostly it's a rework of the config file chapter's presentation of board and target config files. - Give the new path for scripts! - Move board-config material out of the target-config section - Add more board-config info, notably for reset-init events - Link out of the board-config section to NAND, NOR, and Reset chapters - Emphasize target input vs. output naming conventions - Other textual improvements Plus some other updates, like adding my copyright (now that I've basically rewritten much of this). git-svn-id: svn://svn.berlios.de/openocd/trunk@2354 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
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doc/openocd.texi
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doc/openocd.texi
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@ -23,6 +23,7 @@ of the Open On-Chip Debugger (OpenOCD).
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@item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
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@item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
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@item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
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@item Copyright @copyright{} 2009 David Brownell
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@end itemize
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@quotation
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@ -943,6 +944,10 @@ its @command{xscale vector_catch} sibling) can be a timesaver
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during some debug sessions, but don't make everyone use that either.
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Keep those kinds of debugging aids in your user config file.
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TCP/IP port configuration is another example of something which
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is environment-specific, and should only appear in
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a user config file. @xref{TCP/IP Ports}.
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@section Project-Specific Utilities
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A few project-specific utility
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@ -1015,21 +1020,21 @@ including developers and integrators of OpenOCD and any user who
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needs to get a new board working smoothly.
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It provides guidelines for creating those files.
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You should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
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You should find the following directories under @t{$(INSTALLDIR)/scripts}:
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@itemize @bullet
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@item @b{interface}
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@*Think JTAG Dongle. Files that configure the JTAG dongle go here.
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@item @b{board}
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@* Think Circuit Board, PWA, PCB, they go by many names. Board files
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contain initialization items that are specific to a board - for
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example: The SDRAM initialization sequence for the board, or the type
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of external flash and what address it is found at. Any initialization
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@item @file{interface} ...
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think JTAG Dongle. Files that configure JTAG adapters go here.
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@item @file{board} ...
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think Circuit Board, PWA, PCB, they go by many names. Board files
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contain initialization items that are specific to a board. For
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example, the SDRAM initialization sequence for the board, or the type
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of external flash and what address it uses. Any initialization
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sequence to enable that external flash or SDRAM should be found in the
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board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
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board file. Boards may also contain multiple targets: two CPUs; or
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a CPU and an FPGA or CPLD.
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@item @b{target}
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@* Think chip. The ``target'' directory represents the JTAG TAPs
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@item @file{target} ...
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think chip. The ``target'' directory represents the JTAG TAPs
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on a chip
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which OpenOCD should control, not a board. Two common types of targets
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are ARM chips and FPGA or CPLD chips.
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@ -1045,7 +1050,7 @@ commands specific to their situation.
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@section Interface Config Files
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The user config file
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should be able to source one of these files via a command like this:
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should be able to source one of these files with a command like this:
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@example
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source [find interface/FOOBAR.cfg]
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@ -1060,48 +1065,206 @@ A separate chapter gives information about how to set these up.
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Read the OpenOCD source code if you have a new kind of hardware interface
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and need to provide a driver for it.
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Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
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@section Board Config Files
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@cindex config file, board
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@cindex board config file
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The user config file
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should be able to source one of these files via a command like this:
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should be able to source one of these files with a command like this:
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@example
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source [find board/FOOBAR.cfg]
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@end example
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The board config file should contain one or more @command{source [find
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target/FOO.cfg]} statements along with any board specific things.
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The point of a board config file is to package everything
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about a given board that user config files need to know.
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In summary the board files should contain (if present)
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@enumerate
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@item External flash configuration (i.e.: NOR flash on CS0, two NANDs on CS2)
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@item SDRAM configuration (size, speed, etc.
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@item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
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@item Multiple TARGET source statements
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@item Reset configuration
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@item One or more @command{source [target/...cfg]} statements
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@item NOR flash configuration (@pxref{NOR Configuration})
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@item NAND flash configuration (@pxref{NAND Configuration})
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@item Target @code{reset} handlers for SDRAM and I/O configuration
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@item JTAG adapter reset configuration (@pxref{Reset Configuration})
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@item All things that are not ``inside a chip''
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@item Things inside a chip go in a 'target' file
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@end enumerate
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Generic things inside target chips belong in target config files,
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not board config files. So for example a @code{reset-init} event
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handler should know board-specific oscillator and PLL parameters,
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which it passes to target-specific utility code.
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The most complex task of a board config file is creating such a
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@code{reset-init} event handler.
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Define those handlers last, after you verify the rest of the board
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configuration works.
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@subsection Communication Between Config files
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In addition to target-specific utility code, another way that
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board and target config files communicate is by following a
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convention on how to use certain variables.
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The full Tcl/Tk language supports ``namespaces'', but JIM-Tcl does not.
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Thus the rule we follow in OpenOCD is this: Variables that begin with
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a leading underscore are temporary in nature, and can be modified and
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used at will within a target configuration file.
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Complex board config files can do the things like this,
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for a board with three chips:
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@example
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# Chip #1: PXA270 for network side, big endian
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set CHIPNAME network
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set ENDIAN big
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source [find target/pxa270.cfg]
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# on return: _TARGETNAME = network.cpu
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# other commands can refer to the "network.cpu" target.
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$_TARGETNAME configure .... events for this CPU..
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# Chip #2: PXA270 for video side, little endian
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set CHIPNAME video
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set ENDIAN little
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source [find target/pxa270.cfg]
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# on return: _TARGETNAME = video.cpu
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# other commands can refer to the "video.cpu" target.
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$_TARGETNAME configure .... events for this CPU..
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# Chip #3: Xilinx FPGA for glue logic
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set CHIPNAME xilinx
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unset ENDIAN
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source [find target/spartan3.cfg]
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@end example
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That example is oversimplified because it doesn't show any flash memory,
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or the @code{reset-init} event handlers to initialize external DRAM
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or (assuming it needs it) load a configuration into the FPGA.
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Such features are usually needed for low-level work with many boards,
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where ``low level'' implies that the board initialization software may
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not be working. (That's a common reason to need JTAG tools. Another
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is to enable working with microcontroller-based systems, which often
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have no debugging support except a JTAG connector.)
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Target config files may also export utility functions to board and user
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config files. Such functions should use name prefixes, to help avoid
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naming collisions.
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Board files could also accept input variables from user config files.
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For example, there might be a @code{J4_JUMPER} setting used to identify
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what kind of flash memory a development board is using, or how to set
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up other clocks and peripherals.
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@subsection Variable Naming Convention
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@cindex variable names
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Most boards have only one instance of a chip.
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However, it should be easy to create a board with more than
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one such chip (as shown above).
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Accordingly, we encourage these conventions for naming
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variables associated with different @file{target.cfg} files,
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to promote consistency and
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so that board files can override target defaults.
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Inputs to target config files include:
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@itemize @bullet
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@item @code{CHIPNAME} ...
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This gives a name to the overall chip, and is used as part of
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tap identifier dotted names.
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While the default is normally provided by the chip manufacturer,
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board files may need to distinguish between instances of a chip.
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@item @code{ENDIAN} ...
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By default @option{little} - although chips may hard-wire @option{big}.
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Chips that can't change endianness don't need to use this variable.
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@item @code{CPUTAPID} ...
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When OpenOCD examines the JTAG chain, it can be told verify the
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chips against the JTAG IDCODE register.
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The target file will hold one or more defaults, but sometimes the
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chip in a board will use a different ID (perhaps a newer revision).
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@end itemize
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Outputs from target config files include:
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@itemize @bullet
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@item @code{_TARGETNAME} ...
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By convention, this variable is created by the target configuration
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script. The board configuration file may make use of this variable to
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configure things like a ``reset init'' script, or other things
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specific to that board and that target.
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If the chip has 2 targets, the names are @code{_TARGETNAME0},
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@code{_TARGETNAME1}, ... etc.
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@end itemize
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@subsection The reset-init Event Handler
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@cindex event, reset-init
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@cindex reset-init handler
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Board config files run in the OpenOCD configuration stage;
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they can't use TAPs or targets, since they haven't been
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fully set up yet.
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This means you can't write memory or access chip registers;
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you can't even verify that a flash chip is present.
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That's done later in event handlers, of which the target @code{reset-init}
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handler is one of the most important.
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Except on microcontrollers, the basic job of @code{reset-init} event
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handlers is setting up flash and DRAM, as normally handled by boot loaders.
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Microcontrollers rarely use boot loaders; they run right out of their
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on-chip flash and SRAM memory. But they may want to use one of these
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handlers too, if just for developer convenience.
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@quotation Note
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Because this is so very board-specific, and chip-specific, no examples
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are included here.
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Instead, look at the board config files distributed with OpenOCD.
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If you have a boot loader, its source code may also be useful.
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@end quotation
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Some of this code could probably be shared between different boards.
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For example, setting up a DRAM controller often doesn't differ by
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much except the bus width (16 bits or 32?) and memory timings, so a
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reusable TCL procedure loaded by the @file{target.cfg} file might take
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those as parameters.
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Similarly with oscillator, PLL, and clock setup;
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and disabling the watchdog.
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Structure the code cleanly, and provide comments to help
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the next developer doing such work.
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(@emph{You might be that next person} trying to reuse init code!)
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The last thing normally done in a @code{reset-init} handler is probing
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whatever flash memory was configured. For most chips that needs to be
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done while the associated target is halted, either because JTAG memory
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access uses the CPU or to prevent conflicting CPU access.
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@subsection JTAG Clock Rate
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Before your @code{reset-init} handler has set up
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the PLLs and clocking, you may need to use
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a low JTAG clock rate; then you'd increase it later.
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(The rule of thumb for ARM-based processors is 1/8 the CPU clock.)
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If the board supports adaptive clocking, use the @command{jtag_rclk}
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command, in case your board is used with JTAG adapter which
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also supports it. Otherwise use @command{jtag_khz}.
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Set the slow rate at the beginning of the reset sequence,
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and the faster rate as soon as the clocks are at full speed.
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@section Target Config Files
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@cindex config file, target
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@cindex target config file
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Board config files should be able to source one or more
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target config files via a command like this:
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Board config files communicate with target config files using
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naming conventions as described above, and may source one or
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more target config files like this:
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@example
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source [find target/FOOBAR.cfg]
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@end example
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The point of a target config file is to package everything
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about a given chip that board config files need to know.
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In summary the target files should contain
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@enumerate
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@enumerate
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@item Set defaults
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@item Add TAPs to the scan chain
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@item Add CPU targets (includes GDB support)
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@ -1111,7 +1274,7 @@ In summary the target files should contain
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As a rule of thumb, a target file sets up only one chip.
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For a microcontroller, that will often include a single TAP,
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which is a CPU needing a GDB target; and its on-chip flash.
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which is a CPU needing a GDB target, and its on-chip flash.
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More complex chips may include multiple TAPs, and the target
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config file may need to define them all before OpenOCD
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@ -1121,118 +1284,31 @@ an ARM core for operating system use, a DSP,
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another ARM core embedded in an image processing engine,
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and other processing engines.
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@subsection Important variable names
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Most boards will have only one instance of a chip.
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However, it should be easy to create a board with more than
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one such chip.
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Accordingly, we encourage some conventions for naming
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variables associated with different TAPs, to promote
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consistency and
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so that board files can override target defaults, and
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@itemize @bullet
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@item @b{CHIPNAME}
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@* This gives a name to the overall chip, and is used as part of the
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tap identifier dotted name.
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It's normally provided by the chip manufacturer.
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@item @b{ENDIAN}
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@* By default little - unless the chip or board is not normally used that way.
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Chips that can't change endianness don't need to use this variable.
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@item @b{CPUTAPID}
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@* When OpenOCD examines the JTAG chain, it will attempt to identify
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every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
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to verify the tap id number verses configuration file and may issue an
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error or warning like this. The hope is that this will help to pinpoint
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problems in OpenOCD configurations.
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@example
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Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f
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(Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
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Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678,
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Got: 0x3f0f0f0f
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Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
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Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
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@end example
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@item @b{_TARGETNAME}
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@* By convention, this variable is created by the target configuration
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script. The board configuration file may make use of this variable to
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configure things like a ``reset init'' script, or other things
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specific to that board and that target.
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If the chip has 2 targets, use the names @b{_TARGETNAME0},
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@b{_TARGETNAME1}, ... etc.
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@emph{Remember:} The ``board file'' may include multiple targets.
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The user (or board) config file should reasonably be able to:
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@example
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source [find target/FOO.cfg]
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$_TARGETNAME configure ... FOO specific parameters
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source [find target/BAR.cfg]
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$_TARGETNAME configure ... BAR specific parameters
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@end example
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@end itemize
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@subsection Tcl Variables Guide Line
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The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
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Thus the rule we follow in OpenOCD is this: Variables that begin with
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a leading underscore are temporary in nature, and can be modified and
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used at will within a ?TARGET? configuration file.
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@b{EXAMPLE:} The user config file should be able to do this:
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@example
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# Board has 3 chips,
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# PXA270 #1 network side, big endian
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# PXA270 #2 video side, little endian
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# Xilinx Glue logic
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set CHIPNAME network
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set ENDIAN big
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source [find target/pxa270.cfg]
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# variable: _TARGETNAME = network.cpu
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# other commands can refer to the "network.cpu" tap.
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$_TARGETNAME configure .... params for this CPU..
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set ENDIAN little
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set CHIPNAME video
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source [find target/pxa270.cfg]
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# variable: _TARGETNAME = video.cpu
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# other commands can refer to the "video.cpu" tap.
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$_TARGETNAME configure .... params for this CPU..
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unset ENDIAN
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set CHIPNAME xilinx
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source [find target/spartan3.cfg]
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# Since $_TARGETNAME is temporal..
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# these names still work!
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network.cpu configure ... params
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video.cpu configure ... params
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@end example
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@subsection Default Value Boiler Plate Code
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All target configuration files should start with this (or a modified form)
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All target configuration files should start with code like this,
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letting board config files express environment-specific
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differences in how things should be set up.
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@example
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# SIMPLE example
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# Boards may override chip names, perhaps based on role,
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# but the default should match what the vendor uses
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if @{ [info exists CHIPNAME] @} @{
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set _CHIPNAME $CHIPNAME
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@} else @{
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set _CHIPNAME sam7x256
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@}
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# ONLY use ENDIAN with targets that can change it.
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if @{ [info exists ENDIAN] @} @{
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set _ENDIAN $ENDIAN
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@} else @{
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set _ENDIAN little
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@}
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# TAP identifiers may change as chips mature, for example with
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# new revision fields (the "3" here). Pick a good default; you
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# can pass several such identifiers to the "jtag newtap" command.
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if @{ [info exists CPUTAPID ] @} @{
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set _CPUTAPID $CPUTAPID
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@} else @{
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@ -1240,6 +1316,19 @@ if @{ [info exists CPUTAPID ] @} @{
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@}
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@end example
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@emph{Remember:} Board config files may include multiple target
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config files, or the same target file multiple times
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(changing at least @code{CHIPNAME}).
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Likewise, the target configuration file should define
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@code{_TARGETNAME} (or @code{_TARGETNAME0} etc) and
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use it later on when defining debug targets:
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@example
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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@end example
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@subsection Adding TAPs to the Scan Chain
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After the ``defaults'' are set up,
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||||
add the TAPs on each chip to the JTAG scan chain.
|
||||
|
|
@ -1261,12 +1350,25 @@ to source such a config file twice, with different
|
|||
values for @code{CHIPNAME}, so
|
||||
it adds a different TAP each time.
|
||||
|
||||
If there are one or more nonzero @option{-expected-id} values,
|
||||
OpenOCD attempts to verify the actual tap id against those values.
|
||||
It will issue error messages if there is mismatch, which
|
||||
can help to pinpoint problems in OpenOCD configurations.
|
||||
|
||||
@example
|
||||
JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f
|
||||
(Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
|
||||
ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
|
||||
ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
|
||||
ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
|
||||
@end example
|
||||
|
||||
There are more complex examples too, with chips that have
|
||||
multiple TAPs. Ones worth looking at include:
|
||||
|
||||
@itemize
|
||||
@item @file{target/omap3530.cfg} -- with a disabled ARM, and a JRC
|
||||
(there's a DSP too, which is not listed)
|
||||
@item @file{target/omap3530.cfg} -- with disabled ARM and DSP,
|
||||
plus a JRC to enable them
|
||||
@item @file{target/str912.cfg} -- with flash, CPU, and boundary scan
|
||||
@item @file{target/ti_dm355.cfg} -- with ETM, ARM, and JRC (this JRC
|
||||
is not currently used)
|
||||
|
|
@ -1277,7 +1379,9 @@ is not currently used)
|
|||
After adding a TAP for a CPU, you should set it up so that
|
||||
GDB and other commands can use it.
|
||||
@xref{CPU Configuration}.
|
||||
For the at91sam7 example above, the command can look like this:
|
||||
For the at91sam7 example above, the command can look like this;
|
||||
note that @code{$_ENDIAN} is not needed, since OpenOCD defaults
|
||||
to little endian, and this chip doesn't support changing that.
|
||||
|
||||
@example
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
|
|
@ -1428,6 +1532,7 @@ read/write memory on your target, @command{init} must occur before
|
|||
the memory read/write commands. This includes @command{nand probe}.
|
||||
@end deffn
|
||||
|
||||
@anchor{TCP/IP Ports}
|
||||
@section TCP/IP Ports
|
||||
@cindex TCP port
|
||||
@cindex server
|
||||
|
|
@ -3023,11 +3128,12 @@ bank'', and the GDB flash features be enabled.
|
|||
@end enumerate
|
||||
|
||||
Many CPUs have the ablity to ``boot'' from the first flash bank.
|
||||
This means that misprograming that bank can ``brick'' a system,
|
||||
This means that misprogramming that bank can ``brick'' a system,
|
||||
so that it can't boot.
|
||||
JTAG tools, like OpenOCD, are often then used to ``de-brick'' the
|
||||
board by (re)installing working boot firmware.
|
||||
|
||||
@anchor{NOR Configuration}
|
||||
@section Flash Configuration Commands
|
||||
@cindex flash configuration
|
||||
|
||||
|
|
@ -3716,6 +3822,7 @@ is larger than 0xffffffff, the largest 32-bit unsigned integer.)
|
|||
Some larger devices will work, since they are actually multi-chip
|
||||
modules with two smaller chips and individual chipselect lines.
|
||||
|
||||
@anchor{NAND Configuration}
|
||||
@section NAND Configuration Commands
|
||||
@cindex NAND configuration
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue