Michael Bruck <mbruck@digenius.de> ARM11 C99 updates
git-svn-id: svn://svn.berlios.de/openocd/trunk@1685 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
oharboe
parent
00fd07336e
commit
0c9a2e99ca
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@ -373,12 +373,11 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
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{
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FNC_INFO;
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{size_t i;
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for(i = 0; i < asizeof(arm11->reg_values); i++)
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for (size_t i = 0; i < asizeof(arm11->reg_values); i++)
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{
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arm11->reg_list[i].valid = 1;
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arm11->reg_list[i].dirty = 0;
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}}
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}
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/* Save DSCR */
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CHECK_RETVAL(arm11_read_DSCR(arm11, &R(DSCR)));
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@ -454,12 +453,11 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
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/** \todo TODO: handle other mode registers */
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{size_t i;
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for (i = 0; i < 15; i++)
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for (size_t i = 0; i < 15; i++)
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{
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/* MCR p14,0,R?,c0,c5,0 */
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arm11_run_instr_data_from_core(arm11, 0xEE000E15 | (i << 12), &R(RX + i), 1);
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}}
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}
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/* save rDTR */
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@ -528,8 +526,7 @@ void arm11_dump_reg_changes(arm11_common_t * arm11)
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return;
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}
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{size_t i;
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for(i = 0; i < ARM11_REGCACHE_COUNT; i++)
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for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
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{
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if (!arm11->reg_list[i].valid)
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{
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@ -548,7 +545,7 @@ void arm11_dump_reg_changes(arm11_common_t * arm11)
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LOG_DEBUG("%8s %08x (INVALID)", arm11_reg_defs[i].name, arm11->reg_values[i]);
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}
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}
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}}
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}
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}
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/** Restore processor state
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@ -565,8 +562,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
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/** \todo TODO: handle other mode registers */
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/* restore R1 - R14 */
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{size_t i;
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for (i = 1; i < 15; i++)
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for (size_t i = 1; i < 15; i++)
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{
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if (!arm11->reg_list[ARM11_RC_RX + i].dirty)
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continue;
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@ -575,7 +572,7 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
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arm11_run_instr_data_to_core1(arm11, 0xee100e15 | (i << 12), R(RX + i));
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// LOG_DEBUG("RESTORE R" ZU " %08x", i, R(RX + i));
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}}
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}
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arm11_run_instr_data_finish(arm11);
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@ -650,15 +647,14 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
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void arm11_record_register_history(arm11_common_t * arm11)
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{
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{size_t i;
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for(i = 0; i < ARM11_REGCACHE_COUNT; i++)
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for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
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{
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arm11->reg_history[i].value = arm11->reg_values[i];
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arm11->reg_history[i].valid = arm11->reg_list[i].valid;
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arm11->reg_list[i].valid = 0;
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arm11->reg_list[i].dirty = 0;
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}}
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}
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}
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@ -1072,22 +1068,20 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
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*reg_list_size = ARM11_GDB_REGISTER_COUNT;
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*reg_list = malloc(sizeof(reg_t*) * ARM11_GDB_REGISTER_COUNT);
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{size_t i;
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for (i = 16; i < 24; i++)
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for (size_t i = 16; i < 24; i++)
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{
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(*reg_list)[i] = &arm11_gdb_dummy_fp_reg;
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}}
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}
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(*reg_list)[24] = &arm11_gdb_dummy_fps_reg;
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{size_t i;
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for (i = 0; i < ARM11_REGCACHE_COUNT; i++)
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for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
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{
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if (arm11_reg_defs[i].gdb_num == -1)
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continue;
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(*reg_list)[arm11_reg_defs[i].gdb_num] = arm11->reg_list + i;
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}}
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}
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return ERROR_OK;
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}
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@ -1123,8 +1117,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
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/** \todo TODO: check if dirty is the right choice to force a rewrite on arm11_resume() */
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arm11->reg_list[ARM11_RC_R1].dirty = 1;
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{size_t i;
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for (i = 0; i < count; i++)
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for (size_t i = 0; i < count; i++)
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{
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/* ldrb r1, [r0], #1 */
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/* ldrb r1, [r0] */
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@ -1136,7 +1129,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
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arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
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*buffer++ = res;
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}}
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}
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break;
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@ -1144,8 +1137,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
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{
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arm11->reg_list[ARM11_RC_R1].dirty = 1;
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size_t i;
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for (i = 0; i < count; i++)
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for (size_t i = 0; i < count; i++)
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{
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/* ldrh r1, [r0], #2 */
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arm11_run_instr_no_data1(arm11,
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@ -1206,8 +1198,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
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{
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arm11->reg_list[ARM11_RC_R1].dirty = 1;
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{size_t i;
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for (i = 0; i < count; i++)
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for (size_t i = 0; i < count; i++)
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{
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/* MRC p14,0,r1,c0,c5,0 */
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arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buffer++);
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@ -1216,7 +1207,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
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/* strb r1, [r0] */
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arm11_run_instr_no_data1(arm11,
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!arm11_config_memrw_no_increment ? 0xe4c01001 : 0xe5c01000);
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}}
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}
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break;
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}
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@ -1225,8 +1216,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
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{
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arm11->reg_list[ARM11_RC_R1].dirty = 1;
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size_t i;
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for (i = 0; i < count; i++)
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for (size_t i = 0; i < count; i++)
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{
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u16 value;
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memcpy(&value, buffer + count * sizeof(u16), sizeof(u16));
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@ -1389,7 +1379,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
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u32 context[16];
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u32 cpsr;
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int exit_breakpoint_size = 0;
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int i;
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int retval = ERROR_OK;
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LOG_DEBUG("Running algorithm");
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@ -1410,7 +1399,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
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// return ERROR_FAIL;
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// Save regs
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for (i = 0; i < 16; i++)
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for (size_t i = 0; i < 16; i++)
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{
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context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32);
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LOG_DEBUG("Save %i: 0x%x",i,context[i]);
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@ -1419,13 +1408,13 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
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cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
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LOG_DEBUG("Save CPSR: 0x%x", cpsr);
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for (i = 0; i < num_mem_params; i++)
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for (int i = 0; i < num_mem_params; i++)
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{
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target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
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}
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// Set register parameters
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for (i = 0; i < num_reg_params; i++)
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for (int i = 0; i < num_reg_params; i++)
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{
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reg_t *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
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if (!reg)
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@ -1495,13 +1484,13 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
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goto del_breakpoint;
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}
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for (i = 0; i < num_mem_params; i++)
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for (int i = 0; i < num_mem_params; i++)
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{
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if (mem_params[i].direction != PARAM_OUT)
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target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
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}
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for (i = 0; i < num_reg_params; i++)
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for (int i = 0; i < num_reg_params; i++)
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{
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if (reg_params[i].direction != PARAM_OUT)
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{
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@ -1527,7 +1516,7 @@ del_breakpoint:
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restore:
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// Restore context
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for (i = 0; i < 16; i++)
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for (size_t i = 0; i < 16; i++)
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{
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LOG_DEBUG("restoring register %s with value 0x%8.8x",
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arm11->reg_list[i].name, context[i]);
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@ -1897,8 +1886,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
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u32 values[6];
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{size_t i;
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for (i = 0; i < (read ? 5 : 6); i++)
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for (size_t i = 0; i < (read ? 5 : 6); i++)
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{
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values[i] = strtoul(args[i + 1], NULL, 0);
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@ -1909,7 +1897,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
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read ? arm11_mrc_syntax : arm11_mcr_syntax);
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return -1;
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}
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}}
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}
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u32 instr = 0xEE000010 |
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(values[0] << 8) |
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@ -252,14 +252,14 @@ void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data,
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void arm11_add_IR (arm11_common_t * arm11, u8 instr, tap_state_t state);
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void arm11_add_debug_SCAN_N (arm11_common_t * arm11, u8 chain, tap_state_t state);
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void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state);
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int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr);
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int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr);
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int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr);
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enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr);
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void arm11_run_instr_data_prepare (arm11_common_t * arm11);
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void arm11_run_instr_data_finish (arm11_common_t * arm11);
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int arm11_run_instr_no_data (arm11_common_t * arm11, u32 * opcode, size_t count);
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int arm11_run_instr_no_data (arm11_common_t * arm11, u32 * opcode, size_t count);
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void arm11_run_instr_no_data1 (arm11_common_t * arm11, u32 opcode);
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int arm11_run_instr_data_to_core (arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
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int arm11_run_instr_data_to_core_noack (arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
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@ -549,14 +549,13 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 *
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size_t error_count = 0;
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{size_t i;
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for (i = 0; i < asizeof(Readies); i++)
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for (size_t i = 0; i < asizeof(Readies); i++)
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{
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if (Readies[i] != 1)
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{
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error_count++;
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}
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}}
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}
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if (error_count)
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LOG_ERROR("Transfer errors " ZU, error_count);
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@ -699,8 +698,7 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
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arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1);
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arm11_setup_field(arm11, 7, &AddressOut, &AddressIn, chain7_fields + 2);
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{size_t i;
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for (i = 0; i < count + 1; i++)
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for (size_t i = 0; i < count + 1; i++)
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{
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if (i < count)
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{
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@ -746,13 +744,12 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
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}
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}
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}
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}}
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}
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{size_t i;
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for (i = 0; i < count; i++)
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for (size_t i = 0; i < count; i++)
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{
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JTAG_DEBUG("SC7 %02d: %02x %s %08x", i, actions[i].address, actions[i].write ? "<=" : "=>", actions[i].value);
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}}
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}
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return ERROR_OK;
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}
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@ -767,22 +764,19 @@ void arm11_sc7_clear_vbw(arm11_common_t * arm11)
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arm11_sc7_action_t clear_bw[arm11->brp + arm11->wrp + 1];
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arm11_sc7_action_t * pos = clear_bw;
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{size_t i;
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for (i = 0; i < asizeof(clear_bw); i++)
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for (size_t i = 0; i < asizeof(clear_bw); i++)
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{
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clear_bw[i].write = true;
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clear_bw[i].value = 0;
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}}
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}
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{size_t i;
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for (i = 0; i < arm11->brp; i++)
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for (size_t i = 0; i < arm11->brp; i++)
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(pos++)->address = ARM11_SC7_BCR0 + i;
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}
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{size_t i;
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for (i = 0; i < arm11->wrp; i++)
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for (size_t i = 0; i < arm11->wrp; i++)
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(pos++)->address = ARM11_SC7_WCR0 + i;
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}
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(pos++)->address = ARM11_SC7_VCR;
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