User's Guide secton on target hardware setup
Highlight the needs to properly jumper development boards; to make the OpenOCD configuration match the jumpering; and to have a usable "reset-init" method when debugging early boot code. Specific mention of the "ATX Mode" that seems useful on many i.MX boards, forcing NAND boot. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>__archive__
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@ -23,7 +23,7 @@ of the Open On-Chip Debugger (OpenOCD).
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@item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
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@item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
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@item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
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@item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
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@item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
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@item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
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@item Copyright @copyright{} 2009 David Brownell
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@item Copyright @copyright{} 2009-2010 David Brownell
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@end itemize
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@end itemize
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@quotation
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@quotation
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@ -1027,6 +1027,86 @@ various kinds of message.
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@end itemize
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@end itemize
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@section Target Hardware Setup
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Chip vendors often provide software development boards which
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are highly configurable, so that they can support all options
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that product boards may require. @emph{Make sure that any
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jumpers or switches match the system configuration you are
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working with.}
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Common issues include:
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@itemize @bullet
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@item @b{JTAG setup} ...
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Boards may support more than one JTAG configuration.
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Examples include jumpers controlling pullups versus pulldowns
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on the nTRST and/or nSRST signals, and choice of connectors
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(e.g. which of two headers on the base board,
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or one from a daughtercard).
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For some Texas Instruments boards, you may need to jumper the
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EMU0 and EMU1 signals (which OpenOCD won't currently control).
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@item @b{Boot Modes} ...
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Complex chips often support multiple boot modes, controlled
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by external jumpers. Make sure this is set up correctly.
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For example many i.MX boards from NXP need to be jumpered
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to "ATX mode" to start booting using the on-chip ROM, when
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using second stage bootloader code stored in a NAND flash chip.
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Such explicit configuration is common, and not limited to
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booting from NAND. You might also need to set jumpers to
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start booting using code loaded from an MMC/SD card; external
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SPI flash; Ethernet, UART, or USB links; NOR flash; OneNAND
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flash; some external host; or various other sources.
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@item @b{Memory Addressing} ...
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Boards which support multiple boot modes may also have jumpers
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to configure memory addressing. One board, for example, jumpers
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external chipselect 0 (used for booting) to address either
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a large SRAM (which must be pre-loaded via JTAG), NOR flash,
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or NAND flash. When it's jumpered to address NAND flash, that
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board must also be told to start booting from on-chip ROM.
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Your @file{board.cfg} file may also need to be told this jumper
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configuration, so that it can know whether to declare NOR flash
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using @command{flash bank} or instead declare NAND flash with
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@command{nand device}; and likewise which probe to perform in
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its @code{reset-init} handler.
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A closely related issue is bus width. Jumpers might need to
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distinguish between 8 bit or 16 bit bus access for the flash
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used to start booting.
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@item @b{Peripheral Access} ...
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Development boards generally provide access to every peripheral
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on the chip, sometimes in multiple modes (such as by providing
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multiple audio codec chips).
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This interacts with software
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configuration of pin multiplexing, where for example a
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given pin may be routed either to the MMC/SD controller
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or the GPIO controller. It also often interacts with
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configuration jumpers. One jumper may be used to route
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signals to an MMC/SD card slot or an expansion bus (which
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might in turn affect booting); others might control which
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audio or video codecs are used.
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@end itemize
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Plus you should of course have @code{reset-init} event handlers
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which set up the hardware to match that jumper configuration.
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That includes in particular any oscillator or PLL used to clock
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the CPU, and any memory controllers needed to access external
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memory and peripherals. Without such handlers, you won't be
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able to access those resources without working target firmware
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which can do that setup ... this can be awkward when you're
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trying to debug that target firmware. Even if there's a ROM
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bootloader which handles a few issues, it rarely provides full
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access to all board-specific capabilities.
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@node Config File Guidelines
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@node Config File Guidelines
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@chapter Config File Guidelines
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@chapter Config File Guidelines
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