flash: add stm32f2x flash lock/unlock cmds
Change-Id: I35344cc47fa4f0a49c034455c5abf479faa0344a Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/988 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>__archive__
Spencer Oliver
parent
b2be4934d7
commit
061f828a50
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@ -98,18 +98,7 @@
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#define STM32_FLASH_SR 0x40023c0C
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#define STM32_FLASH_CR 0x40023c10
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#define STM32_FLASH_OPTCR 0x40023c14
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#define STM32_FLASH_OBR 0x40023c1C
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/* option byte location */
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#define STM32_OB_RDP 0x1FFFF800
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#define STM32_OB_USER 0x1FFFF802
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#define STM32_OB_DATA0 0x1FFFF804
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#define STM32_OB_DATA1 0x1FFFF806
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#define STM32_OB_WRP0 0x1FFFF808
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#define STM32_OB_WRP1 0x1FFFF80A
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#define STM32_OB_WRP2 0x1FFFF80C
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#define STM32_OB_WRP3 0x1FFFF80E
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#define STM32_FLASH_OPTCR1 0x40023c18
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/* FLASH_CR register bits */
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@ -136,6 +125,11 @@
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#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGPERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_OPERR)
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/* STM32_FLASH_OPTCR register bits */
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#define OPT_LOCK (1 << 0)
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#define OPT_START (1 << 1)
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/* STM32_FLASH_OBR bit definitions (reading) */
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#define OPT_ERROR 0
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@ -150,8 +144,20 @@
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#define KEY1 0x45670123
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#define KEY2 0xCDEF89AB
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/* option register unlock key */
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#define OPTKEY1 0x08192A3B
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#define OPTKEY2 0x4C5D6E7F
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struct stm32x_options {
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uint8_t RDP;
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uint8_t user_options;
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uint32_t protection;
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};
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struct stm32x_flash_bank {
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struct stm32x_options option_bytes;
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int probed;
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bool has_large_mem; /* stm32f42x/stm32f43x family */
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};
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/* flash bank stm32x <base> <size> 0 0 <target#>
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@ -255,6 +261,120 @@ static int stm32x_unlock_reg(struct target *target)
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return ERROR_OK;
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}
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static int stm32x_unlock_option_reg(struct target *target)
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{
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uint32_t ctrl;
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int retval = target_read_u32(target, STM32_FLASH_OPTCR, &ctrl);
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if (retval != ERROR_OK)
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return retval;
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if ((ctrl & OPT_LOCK) == 0)
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return ERROR_OK;
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/* unlock option registers */
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retval = target_write_u32(target, STM32_FLASH_OPTKEYR, OPTKEY1);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u32(target, STM32_FLASH_OPTKEYR, OPTKEY2);
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if (retval != ERROR_OK)
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return retval;
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retval = target_read_u32(target, STM32_FLASH_OPTCR, &ctrl);
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if (retval != ERROR_OK)
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return retval;
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if (ctrl & OPT_LOCK) {
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LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %x", ctrl);
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return ERROR_TARGET_FAILURE;
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}
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return ERROR_OK;
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}
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static int stm32x_read_options(struct flash_bank *bank)
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{
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uint32_t optiondata;
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struct stm32x_flash_bank *stm32x_info = NULL;
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struct target *target = bank->target;
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stm32x_info = bank->driver_priv;
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/* read current option bytes */
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int retval = target_read_u32(target, STM32_FLASH_OPTCR, &optiondata);
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if (retval != ERROR_OK)
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return retval;
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stm32x_info->option_bytes.user_options = optiondata & 0xec;
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stm32x_info->option_bytes.RDP = (optiondata >> 8) & 0xff;
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stm32x_info->option_bytes.protection = (optiondata >> 16) & 0xfff;
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if (stm32x_info->has_large_mem) {
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retval = target_read_u32(target, STM32_FLASH_OPTCR1, &optiondata);
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if (retval != ERROR_OK)
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return retval;
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/* append protection bits */
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stm32x_info->option_bytes.protection |= (optiondata >> 4) & 0x00fff000;
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}
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if (stm32x_info->option_bytes.RDP != 0xAA)
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LOG_INFO("Device Security Bit Set");
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return ERROR_OK;
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}
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static int stm32x_write_options(struct flash_bank *bank)
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{
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struct stm32x_flash_bank *stm32x_info = NULL;
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struct target *target = bank->target;
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uint32_t optiondata;
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stm32x_info = bank->driver_priv;
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int retval = stm32x_unlock_option_reg(target);
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if (retval != ERROR_OK)
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return retval;
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/* rebuild option data */
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optiondata = stm32x_info->option_bytes.user_options;
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buf_set_u32(&optiondata, 8, 8, stm32x_info->option_bytes.RDP);
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buf_set_u32(&optiondata, 16, 12, stm32x_info->option_bytes.protection);
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/* program options */
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retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata);
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if (retval != ERROR_OK)
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return retval;
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if (stm32x_info->has_large_mem) {
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uint32_t optiondata2 = 0;
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buf_set_u32(&optiondata2, 16, 12, stm32x_info->option_bytes.protection >> 12);
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retval = target_write_u32(target, STM32_FLASH_OPTCR1, optiondata2);
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if (retval != ERROR_OK)
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return retval;
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}
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/* start programming cycle */
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retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata | OPT_START);
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if (retval != ERROR_OK)
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return retval;
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/* wait for completion */
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retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
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if (retval != ERROR_OK)
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return retval;
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/* relock registers */
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retval = target_write_u32(target, STM32_FLASH_OPTCR, OPT_LOCK);
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if (retval != ERROR_OK)
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return retval;
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return ERROR_OK;
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}
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static int stm32x_protect_check(struct flash_bank *bank)
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{
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return ERROR_OK;
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@ -588,6 +708,7 @@ static int stm32x_probe(struct flash_bank *bank)
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uint32_t base_address = 0x08000000;
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stm32x_info->probed = 0;
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stm32x_info->has_large_mem = false;
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/* read stm32 device id register */
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int retval = stm32x_get_device_id(bank, &device_id);
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@ -603,6 +724,7 @@ static int stm32x_probe(struct flash_bank *bank)
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break;
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case 0x419:
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max_flash_size_in_kb = 2048;
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stm32x_info->has_large_mem = true;
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break;
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default:
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LOG_WARNING("Cannot identify target as a STM32 family.");
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@ -629,7 +751,7 @@ static int stm32x_probe(struct flash_bank *bank)
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int num_pages = (flash_size_in_kb / 128) + 4;
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/* check for larger 2048 bytes devices */
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if (flash_size_in_kb > 1024)
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if (stm32x_info->has_large_mem)
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num_pages += 4;
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/* check that calculation result makes sense */
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@ -652,7 +774,7 @@ static int stm32x_probe(struct flash_bank *bank)
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/* dynamic memory */
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setup_sector(bank, 4 + 1, MAX(12, num_pages) - 5, 128 * 1024);
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if (num_pages > 12) {
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if (stm32x_info->has_large_mem) {
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/* fixed memory for larger devices */
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setup_sector(bank, 12, 4, 16 * 1024);
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@ -747,22 +869,106 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
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return ERROR_OK;
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}
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static int stm32x_mass_erase(struct flash_bank *bank)
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COMMAND_HANDLER(stm32x_handle_lock_command)
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{
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int retval;
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struct target *target = bank->target;
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struct target *target = NULL;
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struct stm32x_flash_bank *stm32x_info = NULL;
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if (CMD_ARGC < 1)
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return ERROR_COMMAND_SYNTAX_ERROR;
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struct flash_bank *bank;
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int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
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if (ERROR_OK != retval)
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return retval;
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stm32x_info = bank->driver_priv;
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target = bank->target;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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if (stm32x_read_options(bank) != ERROR_OK) {
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command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
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return ERROR_OK;
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}
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/* set readout protection */
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stm32x_info->option_bytes.RDP = 0;
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if (stm32x_write_options(bank) != ERROR_OK) {
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command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
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return ERROR_OK;
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}
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command_print(CMD_CTX, "%s locked", bank->driver->name);
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return ERROR_OK;
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}
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COMMAND_HANDLER(stm32x_handle_unlock_command)
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{
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struct target *target = NULL;
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struct stm32x_flash_bank *stm32x_info = NULL;
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if (CMD_ARGC < 1)
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return ERROR_COMMAND_SYNTAX_ERROR;
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struct flash_bank *bank;
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int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
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if (ERROR_OK != retval)
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return retval;
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stm32x_info = bank->driver_priv;
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target = bank->target;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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if (stm32x_read_options(bank) != ERROR_OK) {
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command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
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return ERROR_OK;
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}
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/* clear readout protection and complementary option bytes
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* this will also force a device unlock if set */
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stm32x_info->option_bytes.RDP = 0xAA;
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if (stm32x_write_options(bank) != ERROR_OK) {
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command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
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return ERROR_OK;
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}
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command_print(CMD_CTX, "%s unlocked.\n"
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"INFO: a reset or power cycle is required "
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"for the new settings to take effect.", bank->driver->name);
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return ERROR_OK;
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}
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static int stm32x_mass_erase(struct flash_bank *bank)
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{
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int retval;
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struct target *target = bank->target;
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struct stm32x_flash_bank *stm32x_info = NULL;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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stm32x_info = bank->driver_priv;
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retval = stm32x_unlock_reg(target);
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if (retval != ERROR_OK)
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return retval;
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/* mass erase flash memory */
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if (bank->num_sectors > 12)
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if (stm32x_info->has_large_mem)
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retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER | FLASH_MER1);
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else
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retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER);
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@ -813,6 +1019,20 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
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}
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static const struct command_registration stm32x_exec_command_handlers[] = {
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{
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.name = "lock",
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.handler = stm32x_handle_lock_command,
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.mode = COMMAND_EXEC,
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.usage = "bank_id",
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.help = "Lock entire flash device.",
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},
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{
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.name = "unlock",
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.handler = stm32x_handle_unlock_command,
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.mode = COMMAND_EXEC,
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.usage = "bank_id",
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.help = "Unlock entire protected flash device.",
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},
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{
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.name = "mass_erase",
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.handler = stm32x_handle_mass_erase_command,
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