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Fix double read, which might have side effects. 

Now passing MemTest{8,16,32,64}

Change-Id: I286d1e2a388d41853e5aa9049490ddb6135b61f1
__archive__
Tim Newsome 2017-02-15 19:05:51 -08:00
parent 713c001242
commit 035b4dd17a
1 changed files with 6 additions and 4 deletions
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10
src/target/riscv/riscv-013.c
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@ -468,14 +468,16 @@ static uint64_t dmi_read(struct target *target, uint16_t address)
uint16_t address_in; uint16_t address_in;
unsigned i = 0; unsigned i = 0;
dmi_scan(target, &address_in, &value, DMI_OP_READ, address, 0); for (i = 0; i < 256; i++) {
do {
status = dmi_scan(target, &address_in, &value, DMI_OP_READ, address, 0); status = dmi_scan(target, &address_in, &value, DMI_OP_READ, address, 0);
if (status == DMI_STATUS_BUSY) { if (status == DMI_STATUS_BUSY) {
increase_dmi_busy_delay(target); increase_dmi_busy_delay(target);
} else {
break;
} }
} while (((status != DMI_STATUS_SUCCESS) || (address_in != address)) && }
i++ < 256);
status = dmi_scan(target, &address_in, &value, DMI_OP_NOP, address, 0);
if (status != DMI_STATUS_SUCCESS) { if (status != DMI_STATUS_SUCCESS) {
LOG_ERROR("failed read from 0x%x; value=0x%" PRIx64 ", status=%d\n", LOG_ERROR("failed read from 0x%x; value=0x%" PRIx64 ", status=%d\n",