Clean up register caching a little.
Change-Id: Id039aedac44d9c206ac4bd30eb3ef754e190c3felog_output
parent
fd49f5e967
commit
02ece46105
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@ -1127,7 +1127,6 @@ static int register_write_direct(struct target *target, unsigned number,
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if (result == ERROR_OK && target->reg_cache) {
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struct reg *reg = &target->reg_cache->reg_list[number];
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buf_set_u64(reg->value, 0, reg->size, value);
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reg->valid = true;
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}
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if (result == ERROR_OK || info->progbufsize + r->impebreak < 2 ||
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!riscv_is_halted(target))
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@ -1186,7 +1185,6 @@ static int register_write_direct(struct target *target, unsigned number,
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if (exec_out == ERROR_OK && target->reg_cache) {
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struct reg *reg = &target->reg_cache->reg_list[number];
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buf_set_u64(reg->value, 0, reg->size, value);
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reg->valid = true;
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}
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if (use_scratch)
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@ -1206,24 +1204,12 @@ static int register_read(struct target *target, uint64_t *value, uint32_t number
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*value = 0;
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return ERROR_OK;
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}
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if (target->reg_cache &&
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(number <= GDB_REGNO_XPR31 ||
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(number >= GDB_REGNO_FPR0 && number <= GDB_REGNO_FPR31))) {
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/* Only check the cache for registers that we know won't spontaneously
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* change. */
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struct reg *reg = &target->reg_cache->reg_list[number];
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if (reg && reg->valid) {
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*value = buf_get_u64(reg->value, 0, reg->size);
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return ERROR_OK;
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}
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}
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int result = register_read_direct(target, value, number);
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if (result != ERROR_OK)
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return ERROR_FAIL;
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if (target->reg_cache) {
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struct reg *reg = &target->reg_cache->reg_list[number];
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buf_set_u64(reg->value, 0, reg->size, *value);
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reg->valid = true;
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}
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return ERROR_OK;
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}
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@ -1992,10 +1992,10 @@ int riscv_set_current_hartid(struct target *target, int hartid)
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/* This might get called during init, in which case we shouldn't be
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* setting up the register cache. */
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if (!target_was_examined(target))
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return ERROR_OK;
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//if (target_was_examined(target) && hartid != previous_hartid)
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if (target_was_examined(target) && riscv_rtos_enabled(target))
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riscv_invalidate_register_cache(target);
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riscv_invalidate_register_cache(target);
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return ERROR_OK;
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}
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@ -2003,6 +2003,8 @@ void riscv_invalidate_register_cache(struct target *target)
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{
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RISCV_INFO(r);
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LOG_DEBUG(">>>");
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register_cache_invalidate(target->reg_cache);
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for (size_t i = 0; i < target->reg_cache->num_regs; ++i) {
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struct reg *reg = &target->reg_cache->reg_list[i];
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@ -2079,6 +2081,12 @@ int riscv_get_register_on_hart(struct target *target, riscv_reg_t *value,
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if (hartid != riscv_current_hartid(target))
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riscv_invalidate_register_cache(target);
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struct reg *reg = &target->reg_cache->reg_list[regid];
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if (reg && reg->valid) {
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*value = buf_get_u64(reg->value, 0, reg->size);
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return ERROR_OK;
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}
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int result = r->get_register(target, value, hartid, regid);
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if (hartid != riscv_current_hartid(target))
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@ -2292,6 +2300,15 @@ static int register_get(struct reg *reg)
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if (result != ERROR_OK)
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return result;
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buf_set_u64(reg->value, 0, reg->size, value);
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/* CSRs (and possibly other extension) registers may change value at any
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* time. */
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if (reg->number <= GDB_REGNO_XPR31 ||
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(reg->number >= GDB_REGNO_FPR0 && reg->number <= GDB_REGNO_FPR31) ||
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reg->number == GDB_REGNO_PC)
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reg->valid = true;
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LOG_DEBUG("[%d,%d] read 0x%" PRIx64 " from %s (valid=%d)",
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target->coreid, riscv_current_hartid(target), value, reg->name,
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reg->valid);
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return ERROR_OK;
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}
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@ -2302,9 +2319,16 @@ static int register_set(struct reg *reg, uint8_t *buf)
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uint64_t value = buf_get_u64(buf, 0, reg->size);
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LOG_DEBUG("write 0x%" PRIx64 " to %s", value, reg->name);
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LOG_DEBUG("[%d,%d] write 0x%" PRIx64 " to %s (valid=%d)",
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target->coreid, riscv_current_hartid(target), value, reg->name,
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reg->valid);
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struct reg *r = &target->reg_cache->reg_list[reg->number];
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r->valid = true;
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/* CSRs (and possibly other extension) registers may change value at any
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* time. */
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if (reg->number <= GDB_REGNO_XPR31 ||
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(reg->number >= GDB_REGNO_FPR0 && reg->number <= GDB_REGNO_FPR31) ||
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reg->number == GDB_REGNO_PC)
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r->valid = true;
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memcpy(r->value, buf, (r->size + 7) / 8);
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riscv_set_register(target, reg->number, value);
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