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srst_gates_jtag option. at91sam9260 needs retesting, and possibly srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock? 

git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
oharboe 2009-09-17 11:23:41 +00:00
parent cb7ad25c04
commit 016e7ebbfa
4 changed files with 25 additions and 1 deletions
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4
doc/openocd.texi
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@ -2018,6 +2018,10 @@ haven't seen hardware with such a bug, and can be worked around).
@option{combined} implies both @option{srst_pulls_trst} and @option{combined} implies both @option{srst_pulls_trst} and
@option{trst_pulls_srst}. @option{trst_pulls_srst}.
@option{srst_gates_jtag} indicates that asserting SRST gates the
JTAG clock. This means that no communication can happen on JTAG
while SRST is asserted.
The optional @var{trst_type} and @var{srst_type} parameters allow the The optional @var{trst_type} and @var{srst_type} parameters allow the
driver mode of each reset line to be specified. These values only affect driver mode of each reset line to be specified. These values only affect
JTAG interfaces with support for different driver modes, like the Amontec JTAG interfaces with support for different driver modes, like the Amontec

1
src/jtag/jtag.h
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@ -277,6 +277,7 @@ enum reset_types {
RESET_TRST_PULLS_SRST = 0x8, RESET_TRST_PULLS_SRST = 0x8,
RESET_TRST_OPEN_DRAIN = 0x10, RESET_TRST_OPEN_DRAIN = 0x10,
RESET_SRST_PUSH_PULL = 0x20, RESET_SRST_PUSH_PULL = 0x20,
RESET_SRST_GATES_JTAG = 0x40,
}; };
enum reset_types jtag_get_reset_config(void); enum reset_types jtag_get_reset_config(void);

8
src/jtag/tcl.c
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@ -845,6 +845,14 @@ static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *
int tmp = 0; int tmp = 0;
int m; int m;
m = RESET_SRST_GATES_JTAG;
tmp = 0;
if (strcmp(*args, "srst_gates_jtag") == 0)
{
tmp = RESET_SRST_GATES_JTAG;
goto next;
}
/* signals */ /* signals */
m = RESET_HAS_TRST | RESET_HAS_SRST; m = RESET_HAS_TRST | RESET_HAS_SRST;
if (strcmp(*args, "none") == 0) if (strcmp(*args, "none") == 0)

13
src/target/arm7_9_common.c
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@ -1021,6 +1021,17 @@ int arm7_9_assert_reset(target_t *target)
return ERROR_FAIL; return ERROR_FAIL;
} }
/* at this point trst has been asserted/deasserted once. We want to
* program embedded ice while SRST is asserted, but some CPUs gate
* the JTAG clock while SRST is asserted
*/
bool srst_asserted = false;
if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) && ((jtag_reset_config & RESET_SRST_GATES_JTAG) == 0))
{
jtag_add_reset(0, 1);
srst_asserted = true;
}
if (target->reset_halt) if (target->reset_halt)
{ {
/* /*
@ -1053,7 +1064,7 @@ int arm7_9_assert_reset(target_t *target)
if (jtag_reset_config & RESET_SRST_PULLS_TRST) if (jtag_reset_config & RESET_SRST_PULLS_TRST)
{ {
jtag_add_reset(1, 1); jtag_add_reset(1, 1);
} else } else if (!srst_asserted)
{ {
jtag_add_reset(0, 1); jtag_add_reset(0, 1);
} }