change %x and %d to PRIx32 and PRId32 where needed for cygwin
parent
e736468b0e
commit
010492a1ed
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@ -817,7 +817,7 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
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target_free_working_area(target,pworking_area);
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LOG_INFO("Page = 0x%x was written.",page);
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LOG_INFO("Page = 0x%" PRIx32 " was written.",page);
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}
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else
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@ -1112,7 +1112,7 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
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target_read_memory(target, target_mem_base+DATA_OFFS, 4, nand->page_size == 2048?512:128, page_buffer);
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memcpy(data, page_buffer, data_size);
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LOG_INFO("Page = 0x%x was read.",page);
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LOG_INFO("Page = 0x%" PRIx32 " was read.",page);
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/* check hw generated ECC for each 256 bytes block with the saved ECC in flash spare area*/
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int idx = nand->page_size/0x200 ;
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@ -1120,9 +1120,9 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
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target_read_memory(target, target_mem_base+ECC_OFFS, 4, 8, ecc_hw_buffer);
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for(i=0;i<idx;i++){
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if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+8+i*16)) )
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LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%x",i*2+1,page);
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LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+1,page);
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if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+12+i*16)) )
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LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%x",i*2+2,page);
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LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+2,page);
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}
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}
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@ -558,7 +558,7 @@ static int pic32mx_probe(struct flash_bank *bank)
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}
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}
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LOG_INFO("flash size = %dkbytes", num_pages / 1024);
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LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
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/* calculate numbers of pages */
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num_pages /= page_size;
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@ -967,7 +967,7 @@ int ahbap_debugport_init(struct adiv5_dap *dap)
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retval = dap_queue_ap_read(dap, AP_REG_IDR, &idreg);
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retval = dap_queue_ap_read(dap, AP_REG_BASE, &romaddr);
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LOG_DEBUG("MEM-AP #%d ID Register 0x%" PRIx32
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LOG_DEBUG("MEM-AP #%" PRId32 " ID Register 0x%" PRIx32
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", Debug ROM Address 0x%" PRIx32,
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dap->apsel, idreg, romaddr);
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@ -718,7 +718,7 @@ static int dpm_bpwp_setup(struct arm_dpm *dpm, struct dpm_bpwp *xp,
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xp->control = control;
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xp->dirty = true;
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LOG_DEBUG("BPWP: addr %8.8x, control %x, number %d",
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LOG_DEBUG("BPWP: addr %8.8" PRIx32 ", control %" PRIx32 ", number %d",
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xp->address, control, xp->number);
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/* hardware is updated in write_dirty_registers() */
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