2009-09-10 08:06:22 +00:00
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source [find target/c100.cfg]
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# basic register defintion for C100
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source [find target/c100regs.tcl]
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# board-config info
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source [find target/c100config.tcl]
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# C100 helper functions
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source [find target/c100helper.tcl]
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# Telo board & C100 support trst and srst
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2009-09-21 18:48:22 +00:00
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# however openocd does not support
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2009-09-10 08:06:22 +00:00
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# 1. setting srst reset pulse width
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# 2. setting delay between srst pulse and JTAG access
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# This really makes the srst useless for now.
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reset_config trst_and_srst separate
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# issue telnet: reset init
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# issue gdb: monitor reset init
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$_TARGETNAME configure -event reset-init {
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jtag_khz 100
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# setup GPIO used as control signals for C100
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setupGPIO
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# This will allow acces to lower 8MB or NOR
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2009-09-21 18:48:22 +00:00
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lowGPIO5
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2009-09-10 08:06:22 +00:00
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# setup NOR size,timing,etc.
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setupNOR
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# setup internals + PLL + DDR2
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initC100
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#turn up the JTAG speed
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jtag_khz 3000
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puts "JTAG speek now 3MHz"
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puts "type helpC100 to get help on C100"
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}
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$_TARGETNAME configure -event reset-deassert-post {
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# Force target into ARM state.
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# soft_reset_halt # not implemented on ARM11
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puts "Detected SRSRT asserted on C100.CPU"
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2009-09-21 18:48:22 +00:00
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2009-09-10 08:06:22 +00:00
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}
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2009-09-21 18:48:22 +00:00
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proc power_restore {} { puts "Sensed power restore. No action." }
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2009-09-10 08:06:22 +00:00
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proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
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# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
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# it's really 16MB but the upper 8mb is controller via gpio
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# openocd does not support 'complex reads/writes' to NOR
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flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
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# writing data to memory does not work without this
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memwrite burst disable
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