2008-11-30 22:25:43 +00:00
|
|
|
# Elector Internet Radio board
|
|
|
|
# http://www.ethernut.de/en/hardware/eir/index.html
|
2008-06-16 19:54:15 +00:00
|
|
|
|
2008-11-30 22:25:43 +00:00
|
|
|
source [find target/sam7se512.cfg]
|
2008-06-16 19:54:15 +00:00
|
|
|
|
2008-11-30 22:25:43 +00:00
|
|
|
$_TARGETNAME configure -event reset-init {
|
2009-09-21 18:48:22 +00:00
|
|
|
# WDT_MR, disable watchdog
|
2008-10-31 06:57:42 +00:00
|
|
|
mww 0xFFFFFD44 0x00008000
|
|
|
|
|
|
|
|
# RSTC_MR, enable user reset
|
|
|
|
mww 0xfffffd08 0xa5000001
|
|
|
|
|
|
|
|
# CKGR_MOR
|
|
|
|
mww 0xFFFFFC20 0x00000601
|
|
|
|
sleep 10
|
|
|
|
|
|
|
|
# CKGR_PLLR
|
|
|
|
mww 0xFFFFFC2C 0x00481c0e
|
|
|
|
sleep 10
|
|
|
|
|
|
|
|
# PMC_MCKR
|
|
|
|
mww 0xFFFFFC30 0x00000007
|
|
|
|
sleep 10
|
|
|
|
|
|
|
|
# PMC_IER
|
|
|
|
mww 0xFFFFFF60 0x00480100
|
|
|
|
|
|
|
|
#
|
|
|
|
# Enable SDRAM interface.
|
|
|
|
#
|
|
|
|
|
|
|
|
# Enable SDRAM control at PIO A.
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xfffff474 0x3f800000 ;# PIO_BSR_OFF
|
|
|
|
mww 0xfffff404 0x3f800000 ;# PIO_PDR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Enable address bus (A0, A2-A11, A13-A17) at PIO B
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xfffff674 0x0003effd ;# PIO_BSR_OFF
|
|
|
|
mww 0xfffff604 0x0003effd ;# PIO_PDR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Enable 16 bit data bus at PIO C
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xfffff870 0x0000ffff ;# PIO_ASR_OFF
|
|
|
|
mww 0xfffff804 0x0000ffff ;# PIO_PDR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Enable SDRAM chip select
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffff80 0x00000002 ;# EBI_CSA_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Set SDRAM characteristics in configuration register.
|
|
|
|
# Hard coded values for MT48LC32M16A2 with 48MHz CPU.
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb8 0x2192215a ;# SDRAMC_CR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
sleep 10
|
|
|
|
|
|
|
|
# Issue 16 bit SDRAM command: NOP
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000011 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Issue 16 bit SDRAM command: Precharge all
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000012 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Issue 8 auto-refresh cycles
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000014 ;# SDRAMC_MR_OFF
|
2009-09-21 18:48:22 +00:00
|
|
|
mww 0x20000000 0x00000000
|
2008-10-31 06:57:42 +00:00
|
|
|
|
2009-09-21 18:48:22 +00:00
|
|
|
# Issue 16 bit SDRAM command: Set mode register
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000013 ;# SDRAMC_MR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
mww 0x20000014 0xcafedede
|
|
|
|
|
|
|
|
# Set refresh rate count ???
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb4 0x00000013 ;# SDRAMC_TR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
|
|
|
|
# Issue 16 bit SDRAM command: Normal mode
|
2010-12-18 17:22:53 +00:00
|
|
|
mww 0xffffffb0 0x00000010 ;# SDRAMC_MR_OFF
|
2008-10-31 06:57:42 +00:00
|
|
|
mww 0x20000000 0x00000180
|
|
|
|
|
|
|
|
#
|
|
|
|
# Enable external reset key.
|
|
|
|
#
|
|
|
|
mww 0xfffffd08 0xa5000001
|
|
|
|
}
|
2008-06-16 19:54:15 +00:00
|
|
|
|