77 lines
2.0 KiB
INI
77 lines
2.0 KiB
INI
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source [find target/at91sam7a2.cfg]
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# delays needed to get stable reads of cpu state
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jtag_ntrst_delay 10
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adapter_nsrst_delay 200
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# board uses pullup and connects only srst
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reset_config srst_open_drain
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# srst is connected to NRESET of CPU and fully resets everything...
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reset_config srst_only srst_pulls_trst
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adapter_khz 1
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$_TARGETNAME configure -event reset-start {
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adapter_khz 1
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}
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$_TARGETNAME configure -event reset-init {
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# init script from http://www.mikrocontroller.net/topic/107462
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# AT91SAM7A2
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# AMC (advanced memory controller)
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echo "setting up AMC"
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# AMC_CS0 - FLASH 1MB (0x40000000-0x400FFFFF) + DM9000E (0x40100000)
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mww 0xFFE00000 0x40003EBD
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# AMC_CS1 - RAM low 2MB (0x40400000-0x405FFFFF)
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mww 0xFFE00004 0x404030A9
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# AMC_CS2 - RAM high 2MB (0x40800000-0x405FFFFF)
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#mww 0xFFE00008 0x404030A9
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# changed to 0x40_8_
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mww 0xFFE00008 0x408030A9
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# AMC_MCR
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mww 0xFFE00024 0x00000004
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# AMC_RCR force remap
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mww 0xFFE00020 0x00000001
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echo "set up AMC"
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sleep 100
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# the following base addresses from the original script did not correspond to those from datasheet
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# changed bases from 0xFF000000 to 0xFFF00000
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# disable watchdog, to prevent unwanted resets
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mww 0xFFFA0068 0x00000000
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echo "disabled watchdog"
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sleep 50
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# disable PLL
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mww 0xFFFEC004 0x18070004
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# PLL = 10 ==> Coreclock = 6Mhz*10/2 = 30 Mhz
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mww 0xFFFEC010 0x762D800A
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# enable PLL
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mww 0xFFFEC000 0x23050004
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echo "set up pll"
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sleep 100
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adapter_khz 5000
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}
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$_TARGETNAME arm7_9 dcc_downloads enable
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$_TARGETNAME arm7_9 fast_memory_access enable
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# remap: ram at 0, flash at 0x40000000, like reset-init above does
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$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
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flash bank onboard.flash cfi 0x40000000 0x00100000 2 2 at91sam7a2.cpu
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# boot: ram at 0x300000, flash at 0x0, useful if board is in funny configuration
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#$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1
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#flash bank onboard1.flash cfi 0x00000000 0x00100000 2 2 at91sam7a2.cpu
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