79 lines
2.0 KiB
INI
79 lines
2.0 KiB
INI
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#
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# This is for the "at91rm9200-DK" (not the EK) eval board.
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#
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# The two are probably very simular.... I have DK...
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#
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# It has atmel at91rm9200 chip.
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source [find target/at91rm9200.cfg]
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$_TARGETNAME configure -event gdb-attach { reset init }
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$_TARGETNAME configure -event reset-init { at91rm9200_dk_init }
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash_bank cfi 0x10000000 0x00200000 2 2 0
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proc at91rm9200_dk_init { } {
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# Try to run at 1khz... Yea, that slow!
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# Chip is really running @ 32khz
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jtag_khz 8
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mww 0xfffffc64 0xffffffff
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## disable all clocks but system clock
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mww 0xfffffc04 0xfffffffe
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## disable all clocks to pioa and piob
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mww 0xfffffc14 0xffffffc3
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## master clock = slow cpu = slow
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## (means the CPU is running at 32khz!)
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mww 0xfffffc30 0
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## main osc enable
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mww 0xfffffc20 0x0000ff01
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## program pllA
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mww 0xfffffc28 0x20263e04
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## program pllB
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mww 0xfffffc2c 0x10483e0e
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## let pll settle... sleep 100msec
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sleep 100
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## switch to fast clock
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mww 0xfffffc30 0x202
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## Sleep some - (go read)
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sleep 100
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#========================================
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# CPU now runs at 180mhz
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# SYS runs at 60mhz.
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jtag_khz 40000
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#========================================
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## set memc for all memories
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mww 0xffffff60 0x02
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## program smc controller
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mww 0xffffff70 0x3284
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## init sdram
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mww 0xffffff98 0x7fffffd0
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## all banks precharge
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mww 0xffffff80 0x02
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## touch sdram chip to make it work
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mww 0x20000000 0
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## sdram controller mode register
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mww 0xffffff90 0x04
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mww 0x20000000 0
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mww 0x20000000 0
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mww 0x20000000 0
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mww 0x20000000 0
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mww 0x20000000 0
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mww 0x20000000 0
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mww 0x20000000 0
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mww 0x20000000 0
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## sdram controller mode register
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## Refresh, etc....
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mww 0xffffff90 0x03
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mww 0x20000080 0
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mww 0xffffff94 0x1f4
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mww 0x20000080 0
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mww 0xffffff90 0x10
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mww 0x20000000 0
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mww 0xffffff00 0x01
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}
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