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tinyriscv-openocd/tcl/target/imx6.cfg

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target/imx6: Update list of supported TAPIDs Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-10 16:54:43 +00:00
#
# Freescale i.MX6 series
#
# Supports 6Q 6D 6QP 6DP 6DL 6S 6SL 6SLL
#
# Some imx6 chips have Cortex-A7 or an Cortex-M and need special handling
#
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx6
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
target/imx6: Fix indentation in DAP_TAPID handling OpenOCD scripts are usually indented with 4 spaces but here there are 8. Change-Id: Iaad53e3b377d246d99119bb7bb5fd75d4422f564 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5039 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-04 13:17:49 +00:00
set _DAP_TAPID $DAP_TAPID
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
} else {
target/imx6: Fix indentation in DAP_TAPID handling OpenOCD scripts are usually indented with 4 spaces but here there are 8. Change-Id: Iaad53e3b377d246d99119bb7bb5fd75d4422f564 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5039 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-04 13:17:49 +00:00
set _DAP_TAPID 0x4ba00477
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
}
target: restructure dap support - add 'dap create' command to create dap instances - move all dap subcmmand into the dap instance commands - keep 'dap info' for convenience - change all armv7 and armv8 targets to take a dap instance instead of a jtag chain position - restructure tap/dap/target relations, jtag tap no longer references the dap, daps are now independently created and initialized. - clean up swd connect - re-initialize DAP also on JTAG errors (e.g. after reset, power cycle) - update documentation - update target files Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4468 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-23 20:17:29 +00:00
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
-expected-id $_DAP_TAPID
# SDMA / no IDCODE
jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
# System JTAG Controller
target/imx6: Update list of supported TAPIDs Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-10 16:54:43 +00:00
# List supported SJC TAPIDs from imx reference manuals:
set _SJC_TAPID_6Q 0x0191c01d
set _SJC_TAPID_6D 0x0191e01d
set _SJC_TAPID_6QP 0x3191c01d
set _SJC_TAPID_6DP 0x3191d01d
set _SJC_TAPID_6DL 0x0891a01d
set _SJC_TAPID_6S 0x0891b01d
set _SJC_TAPID_6SL 0x0891f01d
set _SJC_TAPID_6SLL 0x088c201d
# Allow external override of the first SJC TAPID
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
if { [info exists SJC_TAPID] } {
target/imx6: Update list of supported TAPIDs Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-10 16:54:43 +00:00
set _SJC_TAPID $SJC_TAPID
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
} else {
target/imx6: Update list of supported TAPIDs Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-10 16:54:43 +00:00
set _SJC_TAPID $_SJC_TAPID_6Q
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
}
jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
target/imx6: Add -ignore-version Looking through imx6 manuals all of them claim that "In follow-on silicon revisions the ID value is subject to change by incrementing the first nibble". Handle this by passing -ignore-version to jtag newtap command. Change-Id: I7fc4779f9757d527ea20a5174a8c90f919580013 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5031 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-10 13:06:43 +00:00
-ignore-version \
target/imx6: Update list of supported TAPIDs Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-10 16:54:43 +00:00
-expected-id $_SJC_TAPID \
-expected-id $_SJC_TAPID_6QP \
-expected-id $_SJC_TAPID_6DP \
-expected-id $_SJC_TAPID_6D \
-expected-id $_SJC_TAPID_6DL \
-expected-id $_SJC_TAPID_6S \
-expected-id $_SJC_TAPID_6SL \
-expected-id $_SJC_TAPID_6SLL
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
# GDB target: Cortex-A9, using DAP, configuring only one core
# Base addresses of cores:
# core 0 - 0x82150000
# core 1 - 0x82152000
# core 2 - 0x82154000
# core 3 - 0x82156000
set _TARGETNAME $_CHIPNAME.cpu.0
target: restructure dap support - add 'dap create' command to create dap instances - move all dap subcmmand into the dap instance commands - keep 'dap info' for convenience - change all armv7 and armv8 targets to take a dap instance instead of a jtag chain position - restructure tap/dap/target relations, jtag tap no longer references the dap, daps are now independently created and initialized. - clean up swd connect - re-initialize DAP also on JTAG errors (e.g. after reset, power cycle) - update documentation - update target files Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4468 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-23 20:17:29 +00:00
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap \
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
-coreid 0 -dbgbase 0x82150000
# some TCK cycles are required to activate the DEBUG power domain
jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
proc imx6_dbginit {target} {
Fix spelling of ARM Cortex It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-14 18:21:49 +00:00
# General Cortex-A8/A9 debug initialisation
targets: fix target_type name for Cortex-A targets Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of renaming of cortex_a8 to cortex_a, including the names in config files. However that introduced a regression as the name in target_type struct remained unchanged. This adds the last missing bit: actual renaming of the target name as understood by OpenOCD. Also change the (hopefully) last instance of using it in the supplied config files, namely from imx6.cfg. Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1420 Tested-by: jenkins Reviewed-by: Chris Johns <chrisj@rtems.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-23 11:20:45 +00:00
cortex_a dbginit
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
}
# Slow speed to be sure it will work
Remove jtag_rclk from target configs Some boards might have RCLK omitted from the JTAG connector and if the interface claims support for it, OpenOCD will end up trying to use RCLK while it's actually impossible. This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch. Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1695 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2013-10-13 15:15:24 +00:00
adapter_khz 1000
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
cfg: add basic support of Freescale i.MX6 series targets This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-08 00:12:49 +00:00
$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"