tinyriscv-openocd/tcl/target/or1k.cfg

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set _ENDIAN big
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME or1k
}
if { [info exists TAP_TYPE] } {
set _TAP_TYPE $TAP_TYPE
} else {
puts "You need to select a tap type"
shutdown
}
# Configure the target
if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
if { [info exists FPGATAPID] } {
set _FPGATAPID $FPGATAPID
} else {
puts "You need to set your FPGA JTAG ID"
shutdown
}
jtag newtap $_CHIPNAME cpu -irlen 10 -expected-id $_FPGATAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
# Select the TAP core we are using
tap_select vjtag
} else {
# OpenCores Mohor JTAG TAP ID
set _CPUTAPID 0x14951185
jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
# Select the TAP core we are using
tap_select mohor
}
# Select the debug unit core we are using. This debug unit as an option.
proc ADBG_USE_HISPEED {} { return 1 }
# If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
# on burst reads and writes to improve download speeds.
# This option must match the RTL configured option.
du_select adv [ADBG_USE_HISPEED]