2010-07-13 13:17:00 +00:00
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# Avalue RSC-W8910 sbc
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# http://www.avalue.com.tw/products/RSC-W910.cfm
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# 2MB NOR Flash
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# 64MB SDRAM
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# 128MB NAND Flash
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# Based on Nuvoton nuc910
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source [find target/nuc910.cfg]
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#
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# reset only behaves correctly if we use srst_pulls_trst
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#
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reset_config trst_and_srst srst_pulls_trst
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adapter_khz 1000
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0x20000000 0x00200000 2 2 $_TARGETNAME
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#
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# Target events
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#
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$_TARGETNAME configure -event reset-start {adapter_khz 1000}
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$_TARGETNAME configure -event reset-init {
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# switch on PLL for 200MHz operation
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# running from 15MHz input clock
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2010-07-16 15:59:35 +00:00
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mww 0xB0000200 0x00000030 # CLKEN
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2010-07-13 13:17:00 +00:00
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mww 0xB0000204 0x00000f3c # CLKSEL
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mww 0xB0000208 0x05007000 # CLKDIV
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mww 0xB000020C 0x00004f24 # PLLCON0
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mww 0xB0000210 0x00002b63 # PLLCON1
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2010-07-16 15:59:35 +00:00
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mww 0xB000000C 0x08817fa6 # MFSEL
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2010-07-13 13:17:00 +00:00
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sleep 10
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# we are now running @ 200MHz
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# enable all openocd speed tweaks
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arm7_9 dcc_downloads enable
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arm7_9 fast_memory_access enable
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adapter_khz 15000
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# map nor flash to 0x20000000
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# map sdram to 0x00000000
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mww 0xb0001000 0x000530c1 # EBICON
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mww 0xb0001004 0x40030084 # ROMCON
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mww 0xb0001008 0x000010ee # SDCONF0
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mww 0xb000100C 0x00000000 # SDCONF1
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mww 0xb0001010 0x0000015b # SDTIME0
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mww 0xb0001014 0x0000015b # SDTIME1
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mww 0xb0001018 0x00000000 # EXT0CON
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mww 0xb000101C 0x00000000 # EXT1CON
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mww 0xb0001020 0x00000000 # EXT2CON
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mww 0xb0001024 0x00000000 # EXT3CON
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mww 0xb000102c 0x00ff0048 # CKSKEW
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}
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