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tinyriscv-openocd/tcl/board/avnet_ultrazed-eg.cfg

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tcl/board: add configuration for the avnet ultrazed-eg starter kit also contains target configuration for the Xilinx UltraScale+ platform Change-Id: I6300cbc85c1ed71df71d8aaca59500bbf18f0093 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4467 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-13 16:03:38 +00:00
#
# AVNET UltraZED EG StarterKit
Correct ZynqMP configuration to be appropriately named The xilinx_ultrascale.cfg target is actually the configuration for a ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad core A53. Update the filename/comments to reflect this, and include the tap IDs for all known FPGA cores for this part. Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/4850 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-14 10:51:37 +00:00
# ZynqMP UlraScale-EG plus IO Carrier with on-board digilent smt2
tcl/board: add configuration for the avnet ultrazed-eg starter kit also contains target configuration for the Xilinx UltraScale+ platform Change-Id: I6300cbc85c1ed71df71d8aaca59500bbf18f0093 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4467 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-13 16:03:38 +00:00
#
source [find interface/ftdi/digilent_jtag_smt2_nc.cfg]
# jtag transport only
transport select jtag
# reset lines are not wired
reset_config none
# slow default clock
adapter_khz 1000
set CHIPNAME uscale
Correct ZynqMP configuration to be appropriately named The xilinx_ultrascale.cfg target is actually the configuration for a ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad core A53. Update the filename/comments to reflect this, and include the tap IDs for all known FPGA cores for this part. Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/4850 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-14 10:51:37 +00:00
source [find target/xilinx_zynqmp.cfg]