280 lines
7.9 KiB
C
280 lines
7.9 KiB
C
/**
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* @file STM32/i2c_lld.h
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* @brief STM32 I2C subsystem low level driver header.
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* @addtogroup STM32_I2C
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* @{
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*/
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#ifndef _I2C_LLD_H_
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#define _I2C_LLD_H_
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#if HAL_USE_I2C || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief I2C1 driver enable switch.
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* @details If set to @p TRUE the support for I2C1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)
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#define STM32_I2C_USE_I2C1 TRUE
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#endif
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/**
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* @brief I2C2 driver enable switch.
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* @details If set to @p TRUE the support for I2C2 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)
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#define STM32_I2C_USE_I2C2 TRUE
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#endif
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/**
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* @brief I2C1 interrupt priority level setting.
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* @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2C_I2C1_IRQ_PRIORITY 0xA0
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#endif
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/**
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* @brief I2C2 interrupt priority level setting.
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* @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2C_I2C2_IRQ_PRIORITY 0xA0
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/** @brief No pending conditions.*/
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#define I2C_NO_ERROR 0
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/*@brief external Stop or Start condition during an address or a data transfer*/
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#define I2C_BUS_ERROR 1
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/** @brief */
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#define I2C_ARBITRATION_LOSS 2
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/** @brief */
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#define I2C_ACK_FAIL 4
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/** @brief */
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#define I2C_OVERRUN_UNDERRUN 8
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/** @brief */
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#define I2C_PEC_ERROR 16
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/** @brief */
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#define I2C_TIMEOUT 32
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/** @brief */
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#define I2C_SMBUS_ALERT 64
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an I2C driver.
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*/
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typedef struct I2CDriver I2CDriver;
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/**
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* @brief Type of a structure representing an I2C driver.
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*/
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typedef struct I2CSlaveConfig I2CSlaveConfig;
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/**
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* @brief I2C notification callback type.
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* @details This function must be used to send start or stop events to I2C bus,
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* and change states of I2CDriver.
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*
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* @param[in] i2cp pointer to the @p I2CDriver object triggering the
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* callback
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* @param[in] i2cscfg pointer to the @p I2CSlaveConfig object triggering the
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* callback
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*/
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typedef void (*i2ccallback_t)(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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/**
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* @brief I2C error notification callback type.
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*
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* @param[in] i2cp TODO: pointer to the @p I2CDriver object triggering the
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* callback
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*/
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typedef void (*i2cerrorcallback_t)(void);
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typedef enum {
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opmodeI2C,
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opmodeSMBusDevice,
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opmodeSMBusHost,
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} I2C_opMode_t;
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typedef enum {
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stdDutyCycle,
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fastDutyCycle_2,
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fastDutyCycle_16_9,
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} I2C_DutyCycle_t;
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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I2C_opMode_t opMode; /*!< Specifies the I2C mode.*/
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uint32_t ClockSpeed; /*!< Specifies the clock frequency. Must be set to a value lower than 400kHz */
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I2C_DutyCycle_t FastModeDutyCycle;/*!< Specifies the I2C fast mode duty cycle */
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uint8_t OwnAddress7; /*!< Specifies the first device 7-bit own address. */
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uint8_t OwnAddress10; /*!< Specifies the second part of device own address in 10-bit mode. */
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} I2CConfig;
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/**
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* @brief TODO:
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*/
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typedef uint32_t i2cflags_t;
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/**
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* @brief TODO:
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*/
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typedef uint8_t i2cblock_t;
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/**
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* @brief Structure representing an I2C slave configuration.
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* @details Each slave has its own data buffers, adress, and error flags.
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*/
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struct I2CSlaveConfig{
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/**
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* @brief Callback pointer.
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* @note Transfer finished callback. Invoke when all data transferred, or
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* by DMA buffer events
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* @p NULL then the callback is disabled.
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*/
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i2ccallback_t id_callback;
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/**
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* @brief Callback pointer.
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* @note TODO: I don't know, when this callback is inwoked
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* @p NULL then the callback is disabled.
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*/
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i2cerrorcallback_t id_err_callback;
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i2cblock_t *rxbuf; // pointer to buffer
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size_t rxdepth; // depth of buffer
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size_t rxbytes; // count of bytes to sent in one sending
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size_t rxbufhead; // head pointer to current data byte
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i2cblock_t *txbuf;
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size_t txdepth;
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size_t txbytes;
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size_t txbufhead;
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uint8_t addr7; // 7-bit address of the slave
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uint8_t addr10; // used in 10-bit address mode. Set to NULL if not used
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uint16_t error_flags;
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uint8_t rw_bit; // this flag contain R/W bit
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bool_t restart; // send restart or stop event after complete data tx/rx
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//TODO: join error_flags, rw_bit, restart in one word.
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#if I2C_USE_WAIT
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/**
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* @brief Thread waiting for I/O completion.
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*/
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Thread *thread;
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#endif /* I2C_USE_WAIT */
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};
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/**
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* @brief Structure representing an I2C driver.
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*/
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struct I2CDriver{
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/**
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* @brief Driver state.
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*/
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i2cstate_t id_state;
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#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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#if CH_USE_MUTEXES || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the bus.
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*/
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Mutex id_mutex;
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#elif CH_USE_SEMAPHORES
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Semaphore id_semaphore;
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#endif
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#endif /* I2C_USE_MUTUAL_EXCLUSION */
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/**
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* @brief Current configuration data.
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*/
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I2CConfig *id_config;
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/**
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* @brief Current slave configuration data.
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*/
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I2CSlaveConfig *id_slave_config;
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the I2Cx registers block.
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*/
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I2C_TypeDef *id_i2c;
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} ;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/** @cond never*/
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#if STM32_I2C_USE_I2C1
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extern I2CDriver I2CD1;
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#endif
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#if STM32_I2C_USE_I2C2
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extern I2CDriver I2CD2;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void i2c_lld_init(void);
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void i2c_lld_start(I2CDriver *i2cp);
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void i2c_lld_stop(I2CDriver *i2cp);
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void i2c_lld_set_clock(I2CDriver *i2cp);
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void i2c_lld_master_start(I2CDriver *i2cp);
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void i2c_lld_master_stop(I2CDriver *i2cp);
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void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart);
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void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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bool_t i2c_lld_txbyte(I2CDriver *i2cp); // helper function
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void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2c_lld_master_receiveI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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bool_t i2c_lld_rxbyte(I2CDriver *i2cp);
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#ifdef __cplusplus
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}
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#endif
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/** @endcond*/
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#endif // CH_HAL_USE_I2C
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#endif // _I2C_LLD_H_
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