533 lines
18 KiB
C
533 lines
18 KiB
C
/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPC5xx/DSPI_v1/spi_lld.h
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* @brief SPC5xx SPI subsystem low level driver header.
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*
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* @addtogroup SPI
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* @{
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*/
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#ifndef _SPI_LLD_H_
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#define _SPI_LLD_H_
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#if HAL_USE_SPI || defined(__DOXYGEN__)
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#include "spc5_dspi.h"
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief SPID1 driver enable switch.
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* @details If set to @p TRUE the support for DSPI0 is included.
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*/
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#if !defined(SPC5_SPI_USE_DSPI0) || defined(__DOXYGEN__)
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#define SPC5_SPI_USE_DSPI0 FALSE
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#endif
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/**
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* @brief SPID2 driver enable switch.
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* @details If set to @p TRUE the support for DSPI1 is included.
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*/
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#if !defined(SPC5_SPI_USE_DSPI1) || defined(__DOXYGEN__)
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#define SPC5_SPI_USE_DSPI1 FALSE
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#endif
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/**
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* @brief SPID3 driver enable switch.
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* @details If set to @p TRUE the support for DSPI2 is included.
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*/
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#if !defined(SPC5_SPI_USE_DSPI2) || defined(__DOXYGEN__)
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#define SPC5_SPI_USE_DSPI2 FALSE
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#endif
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/**
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* @brief SPID4 driver enable switch.
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* @details If set to @p TRUE the support for DSPI3 is included.
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*/
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#if !defined(SPC5_SPI_USE_DSPI3) || defined(__DOXYGEN__)
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#define SPC5_SPI_USE_DSPI3 FALSE
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#endif
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/**
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* @brief SPID5 driver enable switch.
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* @details If set to @p TRUE the support for DSPI4 is included.
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*/
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#if !defined(SPC5_SPI_USE_DSPI4) || defined(__DOXYGEN__)
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#define SPC5_SPI_USE_DSPI4 FALSE
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#endif
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/**
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* @brief DSPI0 MCR PCS defaults.
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*/
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#if !defined(SPC5_SPI_DSPI0_MCR) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \
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SPC5_MCR_PCSIS1 | \
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SPC5_MCR_PCSIS2 | \
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SPC5_MCR_PCSIS3 | \
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SPC5_MCR_PCSIS4 | \
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SPC5_MCR_PCSIS5 | \
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SPC5_MCR_PCSIS6 | \
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SPC5_MCR_PCSIS7)
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#endif
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/**
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* @brief DSPI1 MCR PCS defaults.
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*/
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#if !defined(SPC5_SPI_DSPI1_MCR) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \
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SPC5_MCR_PCSIS1 | \
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SPC5_MCR_PCSIS2 | \
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SPC5_MCR_PCSIS3 | \
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SPC5_MCR_PCSIS4 | \
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SPC5_MCR_PCSIS5 | \
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SPC5_MCR_PCSIS6 | \
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SPC5_MCR_PCSIS7)
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#endif
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/**
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* @brief DSP2 MCR PCS defaults.
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*/
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#if !defined(SPC5_SPI_DSPI2_MCR) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \
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SPC5_MCR_PCSIS1 | \
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SPC5_MCR_PCSIS2 | \
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SPC5_MCR_PCSIS3 | \
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SPC5_MCR_PCSIS4 | \
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SPC5_MCR_PCSIS5 | \
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SPC5_MCR_PCSIS6 | \
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SPC5_MCR_PCSIS7)
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#endif
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/**
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* @brief DSPI3 MCR PCS defaults.
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*/
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#if !defined(SPC5_SPI_DSPI3_MCR) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI3_MCR (SPC5_MCR_PCSIS0 | \
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SPC5_MCR_PCSIS1 | \
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SPC5_MCR_PCSIS2 | \
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SPC5_MCR_PCSIS3 | \
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SPC5_MCR_PCSIS4 | \
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SPC5_MCR_PCSIS5 | \
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SPC5_MCR_PCSIS6 | \
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SPC5_MCR_PCSIS7)
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#endif
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/**
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* @brief DSPI4 MCR PCS defaults.
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*/
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#if !defined(SPC5_SPI_DSPI4_MCR) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI4_MCR (SPC5_MCR_PCSIS0 | \
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SPC5_MCR_PCSIS1 | \
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SPC5_MCR_PCSIS2 | \
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SPC5_MCR_PCSIS3 | \
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SPC5_MCR_PCSIS4 | \
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SPC5_MCR_PCSIS5 | \
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SPC5_MCR_PCSIS6 | \
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SPC5_MCR_PCSIS7)
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#endif
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/**
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* @brief DSPI0 DMA IRQ priority.
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*/
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#if !defined(SPC5_SPI_DSPI0_DMA_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI1 DMA IRQ priority.
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*/
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#if !defined(SPC5_SPI_DSPI1_DMA_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI2 DMA IRQ priority.
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*/
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#if !defined(SPC5_SPI_DSPI2_DMA_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI3 DMA IRQ priority.
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*/
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#if !defined(SPC5_SPI_DSPI3_DMA_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI3_DMA_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI4 DMA IRQ priority.
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*/
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#if !defined(SPC5_SPI_DSPI4_DMA_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI4_DMA_IRQ_PRIO 10
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#endif
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/**
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* @brief SPI DMA error hook.
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*/
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#if !defined(SPC5_SPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
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#endif
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/**
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* @brief DSPI0 DMA priority.
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*/
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#if !defined(SPC5_SPI_DSPI0_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI0_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI1 DMA priority.
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*/
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#if !defined(SPC5_SPI_DSPI1_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI1_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI2 DMA priority.
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*/
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#if !defined(SPC5_SPI_DSPI2_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI2_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI3 DMA priority.
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*/
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#if !defined(SPC5_SPI_DSPI3_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI3_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI4 DMA priority.
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*/
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#if !defined(SPC5_SPI_DSPI4_IRQ_PRIO) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI4_IRQ_PRIO 10
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#endif
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/**
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* @brief DSPI0 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI0_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief DSPI0 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI0_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/**
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* @brief DSPI1 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI1_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief DSPI1 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI1_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/**
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* @brief DSPI2 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI2_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief DSPI2 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI2_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/**
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* @brief DSPI3 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI3_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI3_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief DSPI3 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI3_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI3_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/**
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* @brief DSPI4 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI4_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI4_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief DSPI4 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_SPI_DSPI4_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_SPI_DSPI4_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if SPC5_SPI_USE_DSPI0 && !SPC5_HAS_DSPI0
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#error "DSPI0 not present in the selected device"
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#endif
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#if SPC5_SPI_USE_DSPI1 && !SPC5_HAS_DSPI1
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#error "DSPI1 not present in the selected device"
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#endif
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#if SPC5_SPI_USE_DSPI2 && !SPC5_HAS_DSPI2
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#error "DSPI2 not present in the selected device"
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#endif
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#if SPC5_SPI_USE_DSPI3 && !SPC5_HAS_DSPI3
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#error "DSPI3 not present in the selected device"
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#endif
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#if SPC5_SPI_USE_DSPI4 && !SPC5_HAS_DSPI4
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#error "DSPI4 not present in the selected device"
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#endif
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#if !SPC5_SPI_USE_DSPI0 && !SPC5_SPI_USE_DSPI1 && \
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!SPC5_SPI_USE_DSPI2 && !SPC5_SPI_USE_DSPI3 && \
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!SPC5_SPI_USE_DSPI4
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#error "SPI driver activated but no DSPI peripheral assigned"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an SPI driver.
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*/
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typedef struct SPIDriver SPIDriver;
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/**
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* @brief SPI notification callback type.
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*
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* @param[in] spip pointer to the @p SPIDriver object triggering the
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* callback
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*/
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typedef void (*spicallback_t)(SPIDriver *spip);
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/**
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* @brief Driver configuration structure.
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* @note Implementations may extend this structure to contain more,
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* architecture dependent, fields.
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*/
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typedef struct {
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/**
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* @brief Operation complete callback.
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*/
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spicallback_t end_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief The chip select line port.
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*/
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ioportid_t ssport;
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/**
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* @brief The chip select line pad number.
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*/
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uint16_t sspad;
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/**
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* @brief DSPI CTAR0 value for this session.
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*/
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uint32_t ctar0;
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/**
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* @brief DSPI PUSHR command for this session.
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* @note Only CTAR0 can be referenced, the other CTARs are not
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* initialized. The data part must be left to zero.
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*/
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uint32_t pushr;
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} SPIConfig;
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/**
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* @brief Structure representing an SPI driver.
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* @note Implementations may extend this structure to contain more,
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* architecture dependent, fields.
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*/
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struct SPIDriver {
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/**
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* @brief Driver state.
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*/
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spistate_t state;
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/**
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* @brief Current configuration data.
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*/
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const SPIConfig *config;
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#if SPI_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Waiting thread.
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*/
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Thread *thread;
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#endif /* SPI_USE_WAIT */
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#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the bus.
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*/
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Mutex mutex;
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#elif CH_CFG_USE_SEMAPHORES
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Semaphore semaphore;
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#endif
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#endif /* SPI_USE_MUTUAL_EXCLUSION */
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#if defined(SPI_DRIVER_EXT_FIELDS)
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SPI_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the DSPI registers block.
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*/
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struct spc5_dspi *dspi;
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/**
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* @brief EDMA channel used for data memory to memory copy.
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*/
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edma_channel_t tx1_channel;
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/**
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* @brief EDMA channel used for transmit.
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*/
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edma_channel_t tx2_channel;
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/**
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* @brief EDMA channel used for receive.
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*/
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edma_channel_t rx_channel;
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/**
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* @brief Last frame of a transmission sequence.
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*/
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uint32_t tx_last;
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/**
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* @brief TX intermediate buffer.
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* @note This field is written by the TX1 DMA channel and read by the
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* TX2 DMA channel.
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*/
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uint32_t tx_intbuf;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if SPC5_SPI_USE_DSPI0 && !defined(__DOXYGEN__)
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extern SPIDriver SPID1;
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#endif
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#if SPC5_SPI_USE_DSPI1 && !defined(__DOXYGEN__)
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extern SPIDriver SPID2;
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#endif
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#if SPC5_SPI_USE_DSPI2 && !defined(__DOXYGEN__)
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extern SPIDriver SPID3;
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#endif
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#if SPC5_SPI_USE_DSPI3 && !defined(__DOXYGEN__)
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extern SPIDriver SPID4;
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#endif
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#if SPC5_SPI_USE_DSPI4 && !defined(__DOXYGEN__)
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extern SPIDriver SPID5;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void spi_lld_init(void);
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void spi_lld_start(SPIDriver *spip);
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void spi_lld_stop(SPIDriver *spip);
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void spi_lld_select(SPIDriver *spip);
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void spi_lld_unselect(SPIDriver *spip);
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void spi_lld_ignore(SPIDriver *spip, size_t n);
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void spi_lld_exchange(SPIDriver *spip, size_t n,
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const void *txbuf, void *rxbuf);
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SPI */
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#endif /* _SPI_LLD_H_ */
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/** @} */
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