451 lines
11 KiB
C
451 lines
11 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM8S/serial_lld.c
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* @brief STM8S low level serial driver code.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief UART1 serial driver identifier.
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*/
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#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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SerialDriver SD1;
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#endif
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/**
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* @brief UART2 serial driver identifier.
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*/
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#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
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SerialDriver SD2;
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#endif
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/**
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* @brief UART3 serial driver identifier.
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*/
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#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
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SerialDriver SD3;
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#endif
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/**
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* @brief Driver default configuration.
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*/
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static ROMCONST SerialConfig default_config = {
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BRR(SERIAL_DEFAULT_BITRATE),
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SD_MODE_PARITY_NONE | SD_MODE_STOP_1
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};
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static void set_error(SerialDriver *sdp, uint8_t sr) {
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flagsmask_t sts = 0;
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/* Note, SR register bit definitions are equal for all UARTs so using
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the UART1 definitions is fine.*/
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if (sr & UART1_SR_OR)
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sts |= SD_OVERRUN_ERROR;
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if (sr & UART1_SR_NF)
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sts |= SD_NOISE_ERROR;
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if (sr & UART1_SR_FE)
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sts |= SD_FRAMING_ERROR;
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if (sr & UART1_SR_PE)
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sts |= SD_PARITY_ERROR;
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chSysLockFromIsr();
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chnAddFlagsI(sdp, sts);
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chSysUnlockFromIsr();
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}
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#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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static void notify1(GenericQueue *qp) {
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(void)qp;
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UART1->CR2 |= UART1_CR2_TIEN;
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}
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/**
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* @brief UART1 initialization.
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*
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* @param[in] config architecture-dependent serial driver configuration
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*/
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static void uart1_init(const SerialConfig *config) {
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UART1->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
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((uint8_t)config->sc_brr & (uint8_t)0x0F));
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UART1->BRR1 = (uint8_t)(config->sc_brr >> 4);
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UART1->CR1 = (uint8_t)(config->sc_mode &
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SD_MODE_PARITY); /* PIEN included. */
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UART1->CR2 = UART1_CR2_RIEN | UART1_CR2_TEN | UART1_CR2_REN;
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UART1->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
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UART1->CR4 = 0;
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UART1->CR5 = 0;
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UART1->PSCR = 1;
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(void)UART1->SR;
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(void)UART1->DR;
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}
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/**
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* @brief UART1 de-initialization.
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*/
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static void uart1_deinit(void) {
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UART1->CR1 = UART1_CR1_UARTD;
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UART1->CR2 = 0;
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UART1->CR3 = 0;
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UART1->CR4 = 0;
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UART1->CR5 = 0;
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UART1->PSCR = 0;
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}
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#endif /* STM8S_SERIAL_USE_UART1 */
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#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
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static void notify2(GenericQueue *qp) {
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(void)qp;
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UART2->CR2 |= UART2_CR2_TIEN;
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}
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/**
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* @brief UART2 initialization.
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*
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* @param[in] config architecture-dependent serial driver configuration
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*/
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static void uart2_init(const SerialConfig *config) {
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UART2->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
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((uint8_t)config->sc_brr & (uint8_t)0x0F));
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UART2->BRR1 = (uint8_t)(config->sc_brr >> 4);
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UART2->CR1 = (uint8_t)(config->sc_mode &
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SD_MODE_PARITY); /* PIEN included. */
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UART2->CR2 = UART2_CR2_RIEN | UART2_CR2_TEN | UART2_CR2_REN;
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UART2->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
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UART2->CR4 = 0;
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UART2->CR5 = 0;
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UART2->CR6 = 0;
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UART2->PSCR = 1;
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(void)UART2->SR;
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(void)UART2->DR;
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}
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/**
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* @brief UART1 de-initialization.
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*/
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static void uart2_deinit(void) {
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UART2->CR1 = UART2_CR1_UARTD;
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UART2->CR2 = 0;
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UART2->CR3 = 0;
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UART2->CR4 = 0;
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UART2->CR5 = 0;
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UART2->CR6 = 0;
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UART2->PSCR = 0;
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}
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#endif /* STM8S_SERIAL_USE_UART1 */
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#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
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static void notify3(GenericQueue *qp) {
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(void)qp;
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UART3->CR2 |= UART3_CR2_TIEN;
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}
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/**
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* @brief UART3 initialization.
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*
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* @param[in] config architecture-dependent serial driver configuration
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*/
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static void uart3_init(const SerialConfig *config) {
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UART3->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
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((uint8_t)config->sc_brr & (uint8_t)0x0F));
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UART3->BRR1 = (uint8_t)(config->sc_brr >> 4);
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UART3->CR1 = (uint8_t)(config->sc_mode &
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SD_MODE_PARITY); /* PIEN included. */
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UART3->CR2 = UART3_CR2_RIEN | UART3_CR2_TEN | UART3_CR2_REN;
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UART3->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
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UART3->CR4 = 0;
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UART3->CR6 = 0;
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(void)UART3->SR;
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(void)UART3->DR;
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}
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/**
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* @brief UART3 de-initialization.
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*/
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static void uart3_deinit(void) {
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UART3->CR1 = UART3_CR1_UARTD;
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UART3->CR2 = 0;
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UART3->CR3 = 0;
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UART3->CR4 = 0;
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UART3->CR6 = 0;
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}
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#endif /* STM8S_SERIAL_USE_UART3 */
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if STM8S_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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/**
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* @brief IRQ 17 service routine.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(17) {
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msg_t b;
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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b = sdRequestDataI(&SD1);
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chSysUnlockFromIsr();
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if (b < Q_OK)
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UART1->CR2 &= (uint8_t)~UART1_CR2_TIEN;
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else
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UART1->DR = (uint8_t)b;
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CH_IRQ_EPILOGUE();
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}
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/**
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* @brief IRQ 18 service routine.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(18) {
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uint8_t sr = UART1->SR;
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CH_IRQ_PROLOGUE();
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if ((sr = UART1->SR) & (UART1_SR_OR | UART1_SR_NF |
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UART1_SR_FE | UART1_SR_PE))
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set_error(&SD1, sr);
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chSysLockFromIsr();
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sdIncomingDataI(&SD1, UART1->DR);
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM8S_SERIAL_USE_UART1 */
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#if STM8S_SERIAL_USE_UART2 || defined(__DOXYGEN__)
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/**
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* @brief IRQ 20 service routine.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(20) {
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msg_t b;
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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b = sdRequestDataI(&SD2);
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chSysUnlockFromIsr();
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if (b < Q_OK)
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UART2->CR2 &= (uint8_t)~UART2_CR2_TIEN;
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else
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UART2->DR = (uint8_t)b;
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CH_IRQ_EPILOGUE();
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}
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/**
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* @brief IRQ 21 service routine.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(21) {
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uint8_t sr = UART2->SR;
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CH_IRQ_PROLOGUE();
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if ((sr = UART2->SR) & (UART2_SR_OR | UART2_SR_NF |
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UART2_SR_FE | UART2_SR_PE))
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set_error(&SD2, sr);
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chSysLockFromIsr();
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sdIncomingDataI(&SD2, UART2->DR);
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM8S_SERIAL_USE_UART2 */
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#if STM8S_SERIAL_USE_UART3 || defined(__DOXYGEN__)
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/**
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* @brief IRQ 20 service routine.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(20) {
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msg_t b;
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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b = sdRequestDataI(&SD3);
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chSysUnlockFromIsr();
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if (b < Q_OK)
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UART3->CR2 &= (uint8_t)~UART3_CR2_TIEN;
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else
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UART3->DR = (uint8_t)b;
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CH_IRQ_EPILOGUE();
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}
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/**
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* @brief IRQ 21 service routine.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(21) {
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uint8_t sr = UART3->SR;
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CH_IRQ_PROLOGUE();
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if ((sr = UART3->SR) & (UART3_SR_OR | UART3_SR_NF |
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UART3_SR_FE | UART3_SR_PE))
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set_error(&SD3, sr);
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chSysLockFromIsr();
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sdIncomingDataI(&SD3, UART3->DR);
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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#endif /* STM8S_SERIAL_USE_UART3 */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level serial driver initialization.
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*
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* @notapi
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*/
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void sd_lld_init(void) {
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#if STM8S_SERIAL_USE_UART1
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sdObjectInit(&SD1, NULL, notify1);
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CLK->PCKENR1 |= CLK_PCKENR1_UART1; /* PCKEN12, clock source. */
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UART1->CR1 = UART1_CR1_UARTD; /* UARTD (low power). */
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#endif
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#if STM8S_SERIAL_USE_UART2
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sdObjectInit(&SD2, NULL, notify2);
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CLK->PCKENR1 |= CLK_PCKENR1_UART2; /* PCKEN13, clock source. */
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UART2->CR1 = UART2_CR1_UARTD; /* UARTD (low power). */
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#endif
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#if STM8S_SERIAL_USE_UART3
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sdObjectInit(&SD3, NULL, notify3);
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CLK->PCKENR1 |= CLK_PCKENR1_UART3; /* PCKEN13, clock source. */
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UART3->CR1 = UART3_CR1_UARTD; /* UARTD (low power). */
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#endif
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}
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/**
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* @brief Low level serial driver configuration and (re)start.
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*
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* @param[in] sdp pointer to a @p SerialDriver object
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* @param[in] config the architecture-dependent serial driver configuration.
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* If this parameter is set to @p NULL then a default
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* configuration is used.
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*
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* @notapi
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*/
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void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
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if (config == NULL)
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config = &default_config;
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#if STM8S_SERIAL_USE_UART1
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if (&SD1 == sdp) {
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uart1_init(config);
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return;
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}
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#endif
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#if STM8S_SERIAL_USE_UART2
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if (&SD2 == sdp) {
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uart2_init(config);
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return;
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}
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#endif
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#if STM8S_SERIAL_USE_UART3
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if (&SD3 == sdp) {
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uart3_init(config);
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return;
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}
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#endif
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}
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/**
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* @brief Low level serial driver stop.
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* @details De-initializes the USART, stops the associated clock, resets the
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* interrupt vector.
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*
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* @param[in] sdp pointer to a @p SerialDriver object
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*
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* @notapi
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*/
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void sd_lld_stop(SerialDriver *sdp) {
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#if STM8S_SERIAL_USE_UART1
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if (&SD1 == sdp) {
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uart1_deinit();
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return;
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}
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#endif
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#if STM8S_SERIAL_USE_UART2
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if (&SD2 == sdp) {
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uart2_deinit();
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return;
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}
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#endif
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#if STM8S_SERIAL_USE_UART3
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if (&SD3 == sdp) {
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uart3_deinit();
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return;
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}
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#endif
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}
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#endif /* HAL_USE_SERIAL */
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/** @} */
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