141 lines
5.1 KiB
C
141 lines
5.1 KiB
C
/*
|
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
|
2011,2012 Giovanni Di Sirio.
|
|
|
|
This file is part of ChibiOS/RT.
|
|
|
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
(at your option) any later version.
|
|
|
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
/*
|
|
* STM32F0xx drivers configuration.
|
|
* The following settings override the default settings present in
|
|
* the various device driver implementation headers.
|
|
* Note that the settings for each driver only have effect if the whole
|
|
* driver is enabled in halconf.h.
|
|
*
|
|
* IRQ priorities:
|
|
* 3...0 Lowest...Highest.
|
|
*
|
|
* DMA priorities:
|
|
* 0...3 Lowest...Highest.
|
|
*/
|
|
|
|
#define STM32F0xx_MCUCONF
|
|
|
|
/*
|
|
* HAL driver system settings.
|
|
*/
|
|
#define STM32_NO_INIT FALSE
|
|
#define STM32_PVD_ENABLE FALSE
|
|
#define STM32_PLS STM32_PLS_LEV0
|
|
#define STM32_HSI_ENABLED TRUE
|
|
#define STM32_HSI14_ENABLED TRUE
|
|
#define STM32_LSI_ENABLED TRUE
|
|
#define STM32_HSE_ENABLED FALSE
|
|
#define STM32_LSE_ENABLED FALSE
|
|
#define STM32_SW STM32_SW_PLL
|
|
#define STM32_PLLSRC STM32_PLLSRC_HSI
|
|
#define STM32_PREDIV_VALUE 1
|
|
#define STM32_PLLMUL_VALUE 12
|
|
#define STM32_HPRE STM32_HPRE_DIV1
|
|
#define STM32_PPRE STM32_PPRE_DIV1
|
|
#define STM32_ADCSW STM32_ADCSW_HSI14
|
|
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
|
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
|
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
|
#define STM32_ADCSW STM32_ADCSW_HSI14
|
|
#define STM32_CECSW STM32_CECSW_HSI
|
|
#define STM32_I2C1SW STM32_I2C1SW_HSI
|
|
#define STM32_USART1SW STM32_USART1SW_PCLK
|
|
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
|
|
|
/*
|
|
* ADC driver system settings.
|
|
*/
|
|
#define STM32_ADC_USE_ADC1 FALSE
|
|
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
|
#define STM32_ADC_IRQ_PRIORITY 2
|
|
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
|
|
|
|
/*
|
|
* EXT driver system settings.
|
|
*/
|
|
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
|
|
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
|
|
|
|
/*
|
|
* GPT driver system settings.
|
|
*/
|
|
#define STM32_GPT_USE_TIM1 FALSE
|
|
#define STM32_GPT_USE_TIM2 FALSE
|
|
#define STM32_GPT_USE_TIM3 FALSE
|
|
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
|
|
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
|
|
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
|
|
|
|
/*
|
|
* ICU driver system settings.
|
|
*/
|
|
#define STM32_ICU_USE_TIM1 FALSE
|
|
#define STM32_ICU_USE_TIM2 FALSE
|
|
#define STM32_ICU_USE_TIM3 FALSE
|
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
|
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
|
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
|
|
|
|
/*
|
|
* PWM driver system settings.
|
|
*/
|
|
#define STM32_PWM_USE_ADVANCED FALSE
|
|
#define STM32_PWM_USE_TIM1 FALSE
|
|
#define STM32_PWM_USE_TIM2 FALSE
|
|
#define STM32_PWM_USE_TIM3 FALSE
|
|
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
|
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
|
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
|
|
|
|
/*
|
|
* SERIAL driver system settings.
|
|
*/
|
|
#define STM32_SERIAL_USE_USART1 FALSE
|
|
#define STM32_SERIAL_USE_USART2 FALSE
|
|
#define STM32_SERIAL_USART1_PRIORITY 3
|
|
#define STM32_SERIAL_USART2_PRIORITY 3
|
|
|
|
/*
|
|
* SPI driver system settings.
|
|
*/
|
|
#define STM32_SPI_USE_SPI1 TRUE
|
|
#define STM32_SPI_USE_SPI2 TRUE
|
|
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
|
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
|
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
|
|
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
|
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
|
|
|
|
/*
|
|
* UART driver system settings.
|
|
*/
|
|
#define STM32_UART_USE_USART1 FALSE
|
|
#define STM32_UART_USE_USART2 FALSE
|
|
#define STM32_UART_USART1_IRQ_PRIORITY 3
|
|
#define STM32_UART_USART2_IRQ_PRIORITY 3
|
|
#define STM32_UART_USART1_DMA_PRIORITY 0
|
|
#define STM32_UART_USART2_DMA_PRIORITY 0
|
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
|